ShuriZma
/
xqemu
mirror of https://github.com/xqemu/xqemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

target-alpha: Enable NPTL. 

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2010-04-12 16:17:22 -07:00 committed by Aurelien Jarno
parent 49563a7274
commit a4b388ff51
3 changed files with 20 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
configure vendored
View File

@ -2432,6 +2432,7 @@ case "$target_arch2" in
;; ;;
alpha) alpha)
target_phys_bits=64 target_phys_bits=64
target_nptl="yes"
;; ;;
arm|armeb) arm|armeb)
TARGET_ARCH=arm TARGET_ARCH=arm

2
linux-user/syscall.c
View File

@ -5768,7 +5768,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
ret = get_errno(fsync(arg1)); ret = get_errno(fsync(arg1));
break; break;
case TARGET_NR_clone: case TARGET_NR_clone:
#if defined(TARGET_SH4) #if defined(TARGET_SH4) || defined(TARGET_ALPHA)
ret = get_errno(do_fork(cpu_env, arg1, arg2, arg3, arg5, arg4)); ret = get_errno(do_fork(cpu_env, arg1, arg2, arg3, arg5, arg4));
#elif defined(TARGET_CRIS) #elif defined(TARGET_CRIS)
ret = get_errno(do_fork(cpu_env, arg2, arg1, arg3, arg4, arg5)); ret = get_errno(do_fork(cpu_env, arg2, arg1, arg3, arg4, arg5));

29
target-alpha/cpu.h
View File

@ -411,15 +411,6 @@ static inline int cpu_mmu_index (CPUState *env)
return (env->ps >> 3) & 3; return (env->ps >> 3) & 3;
} }
#if defined(CONFIG_USER_ONLY)
static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
{
if (newsp)
env->ir[30] = newsp;
/* FIXME: Zero syscall return value. */
}
#endif
#include "cpu-all.h" #include "cpu-all.h"
#include "exec-all.h" #include "exec-all.h"
@ -477,7 +468,7 @@ enum {
IR_S4 = 13, IR_S4 = 13,
IR_S5 = 14, IR_S5 = 14,
IR_S6 = 15, IR_S6 = 15,
#define IR_FP IR_S6 IR_FP = IR_S6,
IR_A0 = 16, IR_A0 = 16,
IR_A1 = 17, IR_A1 = 17,
IR_A2 = 18, IR_A2 = 18,
@ -490,7 +481,7 @@ enum {
IR_T11 = 25, IR_T11 = 25,
IR_RA = 26, IR_RA = 26,
IR_T12 = 27, IR_T12 = 27,
#define IR_PV IR_T12 IR_PV = IR_T12,
IR_AT = 28, IR_AT = 28,
IR_GP = 29, IR_GP = 29,
IR_SP = 30, IR_SP = 30,
@ -531,4 +522,20 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
*flags = env->ps; *flags = env->ps;
} }
#if defined(CONFIG_USER_ONLY)
static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
{
if (newsp) {
env->ir[IR_SP] = newsp;
}
env->ir[IR_V0] = 0;
env->ir[IR_A3] = 0;
}
static inline void cpu_set_tls(CPUState *env, target_ulong newtls)
{
env->unique = newtls;
}
#endif
#endif /* !defined (__CPU_ALPHA_H__) */ #endif /* !defined (__CPU_ALPHA_H__) */