mirror of https://github.com/xqemu/xqemu.git
uhci: convert to memory API
Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
parent
e57964f5b3
commit
a03f66e4ac
|
@ -129,6 +129,7 @@ typedef struct UHCIPort {
|
||||||
|
|
||||||
struct UHCIState {
|
struct UHCIState {
|
||||||
PCIDevice dev;
|
PCIDevice dev;
|
||||||
|
MemoryRegion io_bar;
|
||||||
USBBus bus; /* Note unused when we're a companion controller */
|
USBBus bus; /* Note unused when we're a companion controller */
|
||||||
uint16_t cmd; /* cmd register */
|
uint16_t cmd; /* cmd register */
|
||||||
uint16_t status;
|
uint16_t status;
|
||||||
|
@ -1096,18 +1097,19 @@ static void uhci_frame_timer(void *opaque)
|
||||||
qemu_mod_timer(s->frame_timer, s->expire_time);
|
qemu_mod_timer(s->frame_timer, s->expire_time);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void uhci_map(PCIDevice *pci_dev, int region_num,
|
static const MemoryRegionPortio uhci_portio[] = {
|
||||||
pcibus_t addr, pcibus_t size, int type)
|
{ 0, 32, 2, .write = uhci_ioport_writew, },
|
||||||
{
|
{ 0, 32, 2, .read = uhci_ioport_readw, },
|
||||||
UHCIState *s = (UHCIState *)pci_dev;
|
{ 0, 32, 4, .write = uhci_ioport_writel, },
|
||||||
|
{ 0, 32, 4, .read = uhci_ioport_readl, },
|
||||||
|
{ 0, 32, 1, .write = uhci_ioport_writeb, },
|
||||||
|
{ 0, 32, 1, .read = uhci_ioport_readb, },
|
||||||
|
PORTIO_END_OF_LIST()
|
||||||
|
};
|
||||||
|
|
||||||
register_ioport_write(addr, 32, 2, uhci_ioport_writew, s);
|
static const MemoryRegionOps uhci_ioport_ops = {
|
||||||
register_ioport_read(addr, 32, 2, uhci_ioport_readw, s);
|
.old_portio = uhci_portio,
|
||||||
register_ioport_write(addr, 32, 4, uhci_ioport_writel, s);
|
};
|
||||||
register_ioport_read(addr, 32, 4, uhci_ioport_readl, s);
|
|
||||||
register_ioport_write(addr, 32, 1, uhci_ioport_writeb, s);
|
|
||||||
register_ioport_read(addr, 32, 1, uhci_ioport_readb, s);
|
|
||||||
}
|
|
||||||
|
|
||||||
static USBPortOps uhci_port_ops = {
|
static USBPortOps uhci_port_ops = {
|
||||||
.attach = uhci_attach,
|
.attach = uhci_attach,
|
||||||
|
@ -1154,10 +1156,11 @@ static int usb_uhci_common_initfn(PCIDevice *dev)
|
||||||
|
|
||||||
qemu_register_reset(uhci_reset, s);
|
qemu_register_reset(uhci_reset, s);
|
||||||
|
|
||||||
|
memory_region_init_io(&s->io_bar, &uhci_ioport_ops, s, "uhci", 0x20);
|
||||||
/* Use region 4 for consistency with real hardware. BSD guests seem
|
/* Use region 4 for consistency with real hardware. BSD guests seem
|
||||||
to rely on this. */
|
to rely on this. */
|
||||||
pci_register_bar(&s->dev, 4, 0x20,
|
pci_register_bar_region(&s->dev, 4,
|
||||||
PCI_BASE_ADDRESS_SPACE_IO, uhci_map);
|
PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -1177,6 +1180,14 @@ static int usb_uhci_vt82c686b_initfn(PCIDevice *dev)
|
||||||
return usb_uhci_common_initfn(dev);
|
return usb_uhci_common_initfn(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int usb_uhci_exit(PCIDevice *dev)
|
||||||
|
{
|
||||||
|
UHCIState *s = DO_UPCAST(UHCIState, dev, dev);
|
||||||
|
|
||||||
|
memory_region_destroy(&s->io_bar);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
static Property uhci_properties[] = {
|
static Property uhci_properties[] = {
|
||||||
DEFINE_PROP_STRING("masterbus", UHCIState, masterbus),
|
DEFINE_PROP_STRING("masterbus", UHCIState, masterbus),
|
||||||
DEFINE_PROP_UINT32("firstport", UHCIState, firstport, 0),
|
DEFINE_PROP_UINT32("firstport", UHCIState, firstport, 0),
|
||||||
|
@ -1189,6 +1200,7 @@ static PCIDeviceInfo uhci_info[] = {
|
||||||
.qdev.size = sizeof(UHCIState),
|
.qdev.size = sizeof(UHCIState),
|
||||||
.qdev.vmsd = &vmstate_uhci,
|
.qdev.vmsd = &vmstate_uhci,
|
||||||
.init = usb_uhci_common_initfn,
|
.init = usb_uhci_common_initfn,
|
||||||
|
.exit = usb_uhci_exit,
|
||||||
.vendor_id = PCI_VENDOR_ID_INTEL,
|
.vendor_id = PCI_VENDOR_ID_INTEL,
|
||||||
.device_id = PCI_DEVICE_ID_INTEL_82371SB_2,
|
.device_id = PCI_DEVICE_ID_INTEL_82371SB_2,
|
||||||
.revision = 0x01,
|
.revision = 0x01,
|
||||||
|
@ -1199,6 +1211,7 @@ static PCIDeviceInfo uhci_info[] = {
|
||||||
.qdev.size = sizeof(UHCIState),
|
.qdev.size = sizeof(UHCIState),
|
||||||
.qdev.vmsd = &vmstate_uhci,
|
.qdev.vmsd = &vmstate_uhci,
|
||||||
.init = usb_uhci_common_initfn,
|
.init = usb_uhci_common_initfn,
|
||||||
|
.exit = usb_uhci_exit,
|
||||||
.vendor_id = PCI_VENDOR_ID_INTEL,
|
.vendor_id = PCI_VENDOR_ID_INTEL,
|
||||||
.device_id = PCI_DEVICE_ID_INTEL_82371AB_2,
|
.device_id = PCI_DEVICE_ID_INTEL_82371AB_2,
|
||||||
.revision = 0x01,
|
.revision = 0x01,
|
||||||
|
@ -1209,6 +1222,7 @@ static PCIDeviceInfo uhci_info[] = {
|
||||||
.qdev.size = sizeof(UHCIState),
|
.qdev.size = sizeof(UHCIState),
|
||||||
.qdev.vmsd = &vmstate_uhci,
|
.qdev.vmsd = &vmstate_uhci,
|
||||||
.init = usb_uhci_vt82c686b_initfn,
|
.init = usb_uhci_vt82c686b_initfn,
|
||||||
|
.exit = usb_uhci_exit,
|
||||||
.vendor_id = PCI_VENDOR_ID_VIA,
|
.vendor_id = PCI_VENDOR_ID_VIA,
|
||||||
.device_id = PCI_DEVICE_ID_VIA_UHCI,
|
.device_id = PCI_DEVICE_ID_VIA_UHCI,
|
||||||
.revision = 0x01,
|
.revision = 0x01,
|
||||||
|
|
Loading…
Reference in New Issue