ShuriZma
/
xqemu
mirror of https://github.com/xqemu/xqemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

prep_pci: Simplify I/O endianness 

The prep PowerPC CPU is Big Endian. An explicit byte swap therefore
effectively becomes Little Endian.

Remove explicit byte swaps and mark as Little Endian.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Cc: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Andreas Färber 2012-01-12 03:44:42 +01:00
parent 555260540d
commit 9c95f183fb
1 changed files with 1 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
hw/prep_pci.c
View File

@ -53,14 +53,12 @@ static void PPC_PCIIO_writeb (void *opaque, target_phys_addr_t addr, uint32_t va
static void PPC_PCIIO_writew (void *opaque, target_phys_addr_t addr, uint32_t val) static void PPC_PCIIO_writew (void *opaque, target_phys_addr_t addr, uint32_t val)
{ {
PREPPCIState *s = opaque; PREPPCIState *s = opaque;
val = bswap16(val);
pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 2); pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 2);
} }
static void PPC_PCIIO_writel (void *opaque, target_phys_addr_t addr, uint32_t val) static void PPC_PCIIO_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
{ {
PREPPCIState *s = opaque; PREPPCIState *s = opaque;
val = bswap32(val);
pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 4); pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 4);
} }
@ -77,7 +75,6 @@ static uint32_t PPC_PCIIO_readw (void *opaque, target_phys_addr_t addr)
PREPPCIState *s = opaque; PREPPCIState *s = opaque;
uint32_t val; uint32_t val;
val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 2); val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 2);
val = bswap16(val);
return val; return val;
} }
@ -86,7 +83,6 @@ static uint32_t PPC_PCIIO_readl (void *opaque, target_phys_addr_t addr)
PREPPCIState *s = opaque; PREPPCIState *s = opaque;
uint32_t val; uint32_t val;
val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 4); val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 4);
val = bswap32(val);
return val; return val;
} }
@ -95,7 +91,7 @@ static const MemoryRegionOps PPC_PCIIO_ops = {
.read = { PPC_PCIIO_readb, PPC_PCIIO_readw, PPC_PCIIO_readl, }, .read = { PPC_PCIIO_readb, PPC_PCIIO_readw, PPC_PCIIO_readl, },
.write = { PPC_PCIIO_writeb, PPC_PCIIO_writew, PPC_PCIIO_writel, }, .write = { PPC_PCIIO_writeb, PPC_PCIIO_writew, PPC_PCIIO_writel, },
}, },
.endianness = DEVICE_NATIVE_ENDIAN, .endianness = DEVICE_LITTLE_ENDIAN,
}; };
static int prep_map_irq(PCIDevice *pci_dev, int irq_num) static int prep_map_irq(PCIDevice *pci_dev, int irq_num)