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target-microblaze: Allow the stack protection to be disabled 

Microblaze stack protection is configurable and isn't always enabled.
This patch allows the stack protection to be disabled from the
CPU properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
Alistair Francis 2015-05-29 16:30:43 +10:00 committed by Edgar E. Iglesias
parent 8bac22423e
commit 9aaaa18194
4 changed files with 13 additions and 2 deletions
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5
target-microblaze/cpu-qom.h
View File

@ -59,6 +59,11 @@ typedef struct MicroBlazeCPU {
uint32_t base_vectors; uint32_t base_vectors;
/*< public >*/ /*< public >*/
/* Microblaze Configuration Settings */
struct {
bool stackprot;
} cfg;
CPUMBState env; CPUMBState env;
} MicroBlazeCPU; } MicroBlazeCPU;

5
target-microblaze/cpu.c
View File

@ -114,6 +114,9 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
| PVR2_USE_FPU2_MASK \ | PVR2_USE_FPU2_MASK \
| PVR2_FPU_EXC_MASK \ | PVR2_FPU_EXC_MASK \
| 0; | 0;
env->pvr.regs[0] |= cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0;
env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
@ -156,6 +159,8 @@ static const VMStateDescription vmstate_mb_cpu = {
static Property mb_properties[] = { static Property mb_properties[] = {
DEFINE_PROP_UINT32("xlnx.base-vectors", MicroBlazeCPU, base_vectors, 0), DEFINE_PROP_UINT32("xlnx.base-vectors", MicroBlazeCPU, base_vectors, 0),
DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
true),
DEFINE_PROP_END_OF_LIST(), DEFINE_PROP_END_OF_LIST(),
}; };

1
target-microblaze/cpu.h
View File

@ -128,6 +128,7 @@ typedef struct CPUMBState CPUMBState;
#define PVR0_FAULT 0x00100000 #define PVR0_FAULT 0x00100000
#define PVR0_VERSION_MASK 0x0000FF00 #define PVR0_VERSION_MASK 0x0000FF00
#define PVR0_USER1_MASK 0x000000FF #define PVR0_USER1_MASK 0x000000FF
#define PVR0_SPROT_MASK 0x00000001
/* User 2 PVR mask */ /* User 2 PVR mask */
#define PVR1_USER2_MASK 0xFFFFFFFF #define PVR1_USER2_MASK 0xFFFFFFFF

4
target-microblaze/translate.c
View File

@ -862,7 +862,7 @@ static inline TCGv *compute_ldst_addr(DisasContext *dc, TCGv *t)
int stackprot = 0; int stackprot = 0;
/* All load/stores use ra. */ /* All load/stores use ra. */
if (dc->ra == 1) { if (dc->ra == 1 && dc->cpu->cfg.stackprot) {
stackprot = 1; stackprot = 1;
} }
@ -875,7 +875,7 @@ static inline TCGv *compute_ldst_addr(DisasContext *dc, TCGv *t)
return &cpu_R[dc->ra]; return &cpu_R[dc->ra];
} }
if (dc->rb == 1) { if (dc->rb == 1 && dc->cpu->cfg.stackprot) {
stackprot = 1; stackprot = 1;
} }