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target-xtensa: implement relocatable vectors 

See ISA, 4.4.3 for details.

Vector addresses recorded in core configuration are absolute values that
correspond to default VECBASE value.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Max Filippov 2011-09-06 03:55:51 +04:00 committed by Blue Swirl
parent f3df4c04d8
commit 97836ceed3
3 changed files with 19 additions and 2 deletions
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2
target-xtensa/cpu.h
View File

@ -123,6 +123,7 @@ enum {
INTCLEAR = 227, INTCLEAR = 227,
INTENABLE = 228, INTENABLE = 228,
PS = 230, PS = 230,
VECBASE = 231,
EXCCAUSE = 232, EXCCAUSE = 232,
CCOUNT = 234, CCOUNT = 234,
PRID = 235, PRID = 235,
@ -219,6 +220,7 @@ typedef struct XtensaConfig {
unsigned nareg; unsigned nareg;
int excm_level; int excm_level;
int ndepc; int ndepc;
uint32_t vecbase;
uint32_t exception_vector[EXC_MAX]; uint32_t exception_vector[EXC_MAX];
unsigned ninterrupt; unsigned ninterrupt;
unsigned nlevel; unsigned nlevel;

18
target-xtensa/helper.c
View File

@ -41,6 +41,7 @@ void cpu_reset(CPUXtensaState *env)
env->sregs[LITBASE] &= ~1; env->sregs[LITBASE] &= ~1;
env->sregs[PS] = xtensa_option_enabled(env->config, env->sregs[PS] = xtensa_option_enabled(env->config,
XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10; XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
env->sregs[VECBASE] = env->config->vecbase;
env->pending_irq_level = 0; env->pending_irq_level = 0;
} }
@ -54,6 +55,7 @@ static const XtensaConfig core_config[] = {
.nareg = 64, .nareg = 64,
.ndepc = 1, .ndepc = 1,
.excm_level = 16, .excm_level = 16,
.vecbase = 0x5fff8400,
.exception_vector = { .exception_vector = {
[EXC_RESET] = 0x5fff8000, [EXC_RESET] = 0x5fff8000,
[EXC_WINDOW_OVERFLOW4] = 0x5fff8400, [EXC_WINDOW_OVERFLOW4] = 0x5fff8400,
@ -140,6 +142,16 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
return addr; return addr;
} }
static uint32_t relocated_vector(CPUState *env, uint32_t vector)
{
if (xtensa_option_enabled(env->config,
XTENSA_OPTION_RELOCATABLE_VECTOR)) {
return vector - env->config->vecbase + env->sregs[VECBASE];
} else {
return vector;
}
}
/*! /*!
* Handle penging IRQ. * Handle penging IRQ.
* For the high priority interrupt jump to the corresponding interrupt vector. * For the high priority interrupt jump to the corresponding interrupt vector.
@ -160,7 +172,8 @@ static void handle_interrupt(CPUState *env)
env->sregs[EPS2 + level - 2] = env->sregs[PS]; env->sregs[EPS2 + level - 2] = env->sregs[PS];
env->sregs[PS] = env->sregs[PS] =
(env->sregs[PS] & ~PS_INTLEVEL) | level | PS_EXCM; (env->sregs[PS] & ~PS_INTLEVEL) | level | PS_EXCM;
env->pc = env->config->interrupt_vector[level]; env->pc = relocated_vector(env,
env->config->interrupt_vector[level]);
} else { } else {
env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE; env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE;
@ -212,7 +225,8 @@ void do_interrupt(CPUState *env)
__func__, env->exception_index, __func__, env->exception_index,
env->pc, env->regs[0], env->sregs[PS], env->sregs[CCOUNT]); env->pc, env->regs[0], env->sregs[PS], env->sregs[CCOUNT]);
if (env->config->exception_vector[env->exception_index]) { if (env->config->exception_vector[env->exception_index]) {
env->pc = env->config->exception_vector[env->exception_index]; env->pc = relocated_vector(env,
env->config->exception_vector[env->exception_index]);
env->exception_taken = 1; env->exception_taken = 1;
} else { } else {
qemu_log("%s(pc = %08x) bad exception_index: %d\n", qemu_log("%s(pc = %08x) bad exception_index: %d\n",

1
target-xtensa/translate.c
View File

@ -106,6 +106,7 @@ static const char * const sregnames[256] = {
[INTCLEAR] = "INTCLEAR", [INTCLEAR] = "INTCLEAR",
[INTENABLE] = "INTENABLE", [INTENABLE] = "INTENABLE",
[PS] = "PS", [PS] = "PS",
[VECBASE] = "VECBASE",
[EXCCAUSE] = "EXCCAUSE", [EXCCAUSE] = "EXCCAUSE",
[CCOUNT] = "CCOUNT", [CCOUNT] = "CCOUNT",
[PRID] = "PRID", [PRID] = "PRID",