mirror of https://github.com/xqemu/xqemu.git
softfloat: Replace int16 type with int_fast16_t
Based on the following Coccinelle patch: @@ typedef int16, int_fast16_t; @@ -int16 +int_fast16_t Avoids a workaround for AIX. Add typedef for pre-10 Solaris. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: malc <av1474@comtv.ru> Cc: Ben Taylor <bentaylor.solx86@gmail.com> Tested-by: Bernhard Walle <bernhard@bwalle.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -55,7 +55,7 @@ these four paragraphs for those parts of this code that are retained.
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| The result is stored in the location pointed to by `zPtr'.
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*----------------------------------------------------------------------------*/
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INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr )
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INLINE void shift32RightJamming(uint32_t a, int_fast16_t count, uint32_t *zPtr)
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{
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uint32_t z;
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@ -81,7 +81,7 @@ INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr )
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| The result is stored in the location pointed to by `zPtr'.
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*----------------------------------------------------------------------------*/
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INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr )
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INLINE void shift64RightJamming(uint64_t a, int_fast16_t count, uint64_t *zPtr)
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{
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uint64_t z;
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@ -117,7 +117,7 @@ INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr )
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INLINE void
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shift64ExtraRightJamming(
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uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
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{
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uint64_t z0, z1;
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int8 negCount = ( - count ) & 63;
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@ -154,7 +154,7 @@ INLINE void
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INLINE void
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shift128Right(
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uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
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{
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uint64_t z0, z1;
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int8 negCount = ( - count ) & 63;
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@ -189,7 +189,7 @@ INLINE void
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INLINE void
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shift128RightJamming(
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uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
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{
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uint64_t z0, z1;
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int8 negCount = ( - count ) & 63;
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@ -243,7 +243,7 @@ INLINE void
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uint64_t a0,
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uint64_t a1,
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uint64_t a2,
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int16 count,
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int_fast16_t count,
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uint64_t *z0Ptr,
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uint64_t *z1Ptr,
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uint64_t *z2Ptr
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@ -298,7 +298,7 @@ INLINE void
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INLINE void
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shortShift128Left(
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uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
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uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
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{
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*z1Ptr = a1<<count;
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@ -320,7 +320,7 @@ INLINE void
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uint64_t a0,
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uint64_t a1,
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uint64_t a2,
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int16 count,
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int_fast16_t count,
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uint64_t *z0Ptr,
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uint64_t *z1Ptr,
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uint64_t *z2Ptr
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@ -591,7 +591,7 @@ static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b )
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| value.
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*----------------------------------------------------------------------------*/
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static uint32_t estimateSqrt32( int16 aExp, uint32_t a )
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static uint32_t estimateSqrt32(int_fast16_t aExp, uint32_t a)
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{
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static const uint16_t sqrtOddAdjustments[] = {
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0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0,
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114
fpu/softfloat.c
114
fpu/softfloat.c
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@ -87,7 +87,7 @@ INLINE uint32_t extractFloat16Frac(float16 a)
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| Returns the exponent bits of the half-precision floating-point value `a'.
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*----------------------------------------------------------------------------*/
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INLINE int16 extractFloat16Exp(float16 a)
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INLINE int_fast16_t extractFloat16Exp(float16 a)
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{
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return (float16_val(a) >> 10) & 0x1f;
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}
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@ -218,7 +218,7 @@ INLINE uint32_t extractFloat32Frac( float32 a )
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| Returns the exponent bits of the single-precision floating-point value `a'.
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*----------------------------------------------------------------------------*/
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INLINE int16 extractFloat32Exp( float32 a )
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INLINE int_fast16_t extractFloat32Exp(float32 a)
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{
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return ( float32_val(a)>>23 ) & 0xFF;
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@ -259,7 +259,7 @@ static float32 float32_squash_input_denormal(float32 a STATUS_PARAM)
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*----------------------------------------------------------------------------*/
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static void
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normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr )
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normalizeFloat32Subnormal(uint32_t aSig, int_fast16_t *zExpPtr, uint32_t *zSigPtr)
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{
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int8 shiftCount;
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@ -280,7 +280,7 @@ static void
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| significand.
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*----------------------------------------------------------------------------*/
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INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig )
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INLINE float32 packFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig)
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{
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return make_float32(
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@ -310,7 +310,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig )
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| Binary Floating-Point Arithmetic.
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*----------------------------------------------------------------------------*/
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static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)
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static float32 roundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM)
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{
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int8 roundingMode;
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flag roundNearestEven;
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@ -376,7 +376,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS
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*----------------------------------------------------------------------------*/
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static float32
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normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM)
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normalizeRoundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM)
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{
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int8 shiftCount;
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@ -400,7 +400,7 @@ INLINE uint64_t extractFloat64Frac( float64 a )
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| Returns the exponent bits of the double-precision floating-point value `a'.
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*----------------------------------------------------------------------------*/
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INLINE int16 extractFloat64Exp( float64 a )
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INLINE int_fast16_t extractFloat64Exp(float64 a)
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{
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return ( float64_val(a)>>52 ) & 0x7FF;
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@ -441,7 +441,7 @@ static float64 float64_squash_input_denormal(float64 a STATUS_PARAM)
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*----------------------------------------------------------------------------*/
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static void
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normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr )
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normalizeFloat64Subnormal(uint64_t aSig, int_fast16_t *zExpPtr, uint64_t *zSigPtr)
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{
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int8 shiftCount;
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@ -462,7 +462,7 @@ static void
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| significand.
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*----------------------------------------------------------------------------*/
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INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig )
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INLINE float64 packFloat64(flag zSign, int_fast16_t zExp, uint64_t zSig)
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{
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return make_float64(
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@ -492,11 +492,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig )
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| Binary Floating-Point Arithmetic.
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*----------------------------------------------------------------------------*/
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static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)
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static float64 roundAndPackFloat64(flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM)
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{
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int8 roundingMode;
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flag roundNearestEven;
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int16 roundIncrement, roundBits;
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int_fast16_t roundIncrement, roundBits;
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flag isTiny;
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roundingMode = STATUS(float_rounding_mode);
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@ -558,7 +558,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS
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*----------------------------------------------------------------------------*/
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static float64
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normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM)
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normalizeRoundAndPackFloat64(flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM)
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{
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int8 shiftCount;
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@ -1345,7 +1345,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM )
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int32 float32_to_int32( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, shiftCount;
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int_fast16_t aExp, shiftCount;
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uint32_t aSig;
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uint64_t aSig64;
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@ -1376,7 +1376,7 @@ int32 float32_to_int32( float32 a STATUS_PARAM )
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int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, shiftCount;
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int_fast16_t aExp, shiftCount;
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uint32_t aSig;
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int32_t z;
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a = float32_squash_input_denormal(a STATUS_VAR);
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@ -1416,10 +1416,10 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM )
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| returned.
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*----------------------------------------------------------------------------*/
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int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM )
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int_fast16_t float32_to_int16_round_to_zero(float32 a STATUS_PARAM)
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{
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flag aSign;
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int16 aExp, shiftCount;
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int_fast16_t aExp, shiftCount;
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uint32_t aSig;
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int32 z;
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@ -1468,7 +1468,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM )
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int64 float32_to_int64( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, shiftCount;
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int_fast16_t aExp, shiftCount;
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uint32_t aSig;
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uint64_t aSig64, aSigExtra;
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a = float32_squash_input_denormal(a STATUS_VAR);
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@ -1505,7 +1505,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM )
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int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, shiftCount;
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int_fast16_t aExp, shiftCount;
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uint32_t aSig;
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uint64_t aSig64;
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int64 z;
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@ -1549,7 +1549,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM )
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float64 float32_to_float64( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp;
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int_fast16_t aExp;
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uint32_t aSig;
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a = float32_squash_input_denormal(a STATUS_VAR);
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@ -1579,7 +1579,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM )
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floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp;
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int_fast16_t aExp;
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uint32_t aSig;
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a = float32_squash_input_denormal(a STATUS_VAR);
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@ -1609,7 +1609,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
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float128 float32_to_float128( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp;
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int_fast16_t aExp;
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uint32_t aSig;
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a = float32_squash_input_denormal(a STATUS_VAR);
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@ -1639,7 +1639,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM )
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float32 float32_round_to_int( float32 a STATUS_PARAM)
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{
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flag aSign;
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int16 aExp;
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int_fast16_t aExp;
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uint32_t lastBitMask, roundBitsMask;
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int8 roundingMode;
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uint32_t z;
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@ -1699,9 +1699,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM)
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static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
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{
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int16 aExp, bExp, zExp;
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int_fast16_t aExp, bExp, zExp;
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uint32_t aSig, bSig, zSig;
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int16 expDiff;
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int_fast16_t expDiff;
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aSig = extractFloat32Frac( a );
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aExp = extractFloat32Exp( a );
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@ -1778,9 +1778,9 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
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static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
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{
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int16 aExp, bExp, zExp;
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int_fast16_t aExp, bExp, zExp;
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uint32_t aSig, bSig, zSig;
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int16 expDiff;
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int_fast16_t expDiff;
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aSig = extractFloat32Frac( a );
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aExp = extractFloat32Exp( a );
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@ -1898,7 +1898,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PARAM )
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float32 float32_mul( float32 a, float32 b STATUS_PARAM )
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{
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flag aSign, bSign, zSign;
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int16 aExp, bExp, zExp;
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int_fast16_t aExp, bExp, zExp;
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uint32_t aSig, bSig;
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uint64_t zSig64;
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uint32_t zSig;
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@ -1961,7 +1961,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM )
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float32 float32_div( float32 a, float32 b STATUS_PARAM )
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{
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flag aSign, bSign, zSign;
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int16 aExp, bExp, zExp;
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int_fast16_t aExp, bExp, zExp;
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uint32_t aSig, bSig, zSig;
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a = float32_squash_input_denormal(a STATUS_VAR);
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b = float32_squash_input_denormal(b STATUS_VAR);
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@ -2025,7 +2025,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM )
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float32 float32_rem( float32 a, float32 b STATUS_PARAM )
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{
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flag aSign, zSign;
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int16 aExp, bExp, expDiff;
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int_fast16_t aExp, bExp, expDiff;
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uint32_t aSig, bSig;
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uint32_t q;
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uint64_t aSig64, bSig64, q64;
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@ -2131,7 +2131,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM )
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float32 float32_muladd(float32 a, float32 b, float32 c, int flags STATUS_PARAM)
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{
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flag aSign, bSign, cSign, zSign;
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int16 aExp, bExp, cExp, pExp, zExp, expDiff;
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int_fast16_t aExp, bExp, cExp, pExp, zExp, expDiff;
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uint32_t aSig, bSig, cSig;
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flag pInf, pZero, pSign;
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uint64_t pSig64, cSig64, zSig64;
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@ -2333,7 +2333,7 @@ float32 float32_muladd(float32 a, float32 b, float32 c, int flags STATUS_PARAM)
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float32 float32_sqrt( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, zExp;
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int_fast16_t aExp, zExp;
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uint32_t aSig, zSig;
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uint64_t rem, term;
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a = float32_squash_input_denormal(a STATUS_VAR);
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@ -2419,7 +2419,7 @@ static const float64 float32_exp2_coefficients[15] =
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float32 float32_exp2( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp;
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int_fast16_t aExp;
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uint32_t aSig;
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float64 r, x, xn;
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int i;
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@ -2467,7 +2467,7 @@ float32 float32_exp2( float32 a STATUS_PARAM )
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float32 float32_log2( float32 a STATUS_PARAM )
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{
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flag aSign, zSign;
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int16 aExp;
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int_fast16_t aExp;
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uint32_t aSig, zSig, i;
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a = float32_squash_input_denormal(a STATUS_VAR);
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@ -2732,7 +2732,7 @@ int float32_unordered_quiet( float32 a, float32 b STATUS_PARAM )
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int32 float64_to_int32( float64 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, shiftCount;
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int_fast16_t aExp, shiftCount;
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uint64_t aSig;
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a = float64_squash_input_denormal(a STATUS_VAR);
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@ -2760,7 +2760,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM )
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int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, shiftCount;
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int_fast16_t aExp, shiftCount;
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uint64_t aSig, savedASig;
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int32_t z;
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a = float64_squash_input_denormal(a STATUS_VAR);
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@ -2804,10 +2804,10 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM )
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| returned.
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*----------------------------------------------------------------------------*/
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int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM )
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int_fast16_t float64_to_int16_round_to_zero(float64 a STATUS_PARAM)
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{
|
||||
flag aSign;
|
||||
int16 aExp, shiftCount;
|
||||
int_fast16_t aExp, shiftCount;
|
||||
uint64_t aSig, savedASig;
|
||||
int32 z;
|
||||
|
||||
|
@ -2858,7 +2858,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM )
|
|||
int64 float64_to_int64( float64 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp, shiftCount;
|
||||
int_fast16_t aExp, shiftCount;
|
||||
uint64_t aSig, aSigExtra;
|
||||
a = float64_squash_input_denormal(a STATUS_VAR);
|
||||
|
||||
|
@ -2901,7 +2901,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM )
|
|||
int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp, shiftCount;
|
||||
int_fast16_t aExp, shiftCount;
|
||||
uint64_t aSig;
|
||||
int64 z;
|
||||
a = float64_squash_input_denormal(a STATUS_VAR);
|
||||
|
@ -2951,7 +2951,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM )
|
|||
float32 float64_to_float32( float64 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp;
|
||||
int_fast16_t aExp;
|
||||
uint64_t aSig;
|
||||
uint32_t zSig;
|
||||
a = float64_squash_input_denormal(a STATUS_VAR);
|
||||
|
@ -2984,7 +2984,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM )
|
|||
| than the desired result exponent whenever `zSig' is a complete, normalized
|
||||
| significand.
|
||||
*----------------------------------------------------------------------------*/
|
||||
static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig)
|
||||
static float16 packFloat16(flag zSign, int_fast16_t zExp, uint16_t zSig)
|
||||
{
|
||||
return make_float16(
|
||||
(((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig);
|
||||
|
@ -2996,7 +2996,7 @@ static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig)
|
|||
float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM)
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp;
|
||||
int_fast16_t aExp;
|
||||
uint32_t aSig;
|
||||
|
||||
aSign = extractFloat16Sign(a);
|
||||
|
@ -3026,7 +3026,7 @@ float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM)
|
|||
float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM)
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp;
|
||||
int_fast16_t aExp;
|
||||
uint32_t aSig;
|
||||
uint32_t mask;
|
||||
uint32_t increment;
|
||||
|
@ -3127,7 +3127,7 @@ float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM)
|
|||
floatx80 float64_to_floatx80( float64 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp;
|
||||
int_fast16_t aExp;
|
||||
uint64_t aSig;
|
||||
|
||||
a = float64_squash_input_denormal(a STATUS_VAR);
|
||||
|
@ -3158,7 +3158,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM )
|
|||
float128 float64_to_float128( float64 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp;
|
||||
int_fast16_t aExp;
|
||||
uint64_t aSig, zSig0, zSig1;
|
||||
|
||||
a = float64_squash_input_denormal(a STATUS_VAR);
|
||||
|
@ -3189,7 +3189,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM )
|
|||
float64 float64_round_to_int( float64 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp;
|
||||
int_fast16_t aExp;
|
||||
uint64_t lastBitMask, roundBitsMask;
|
||||
int8 roundingMode;
|
||||
uint64_t z;
|
||||
|
@ -3262,9 +3262,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM)
|
|||
|
||||
static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
|
||||
{
|
||||
int16 aExp, bExp, zExp;
|
||||
int_fast16_t aExp, bExp, zExp;
|
||||
uint64_t aSig, bSig, zSig;
|
||||
int16 expDiff;
|
||||
int_fast16_t expDiff;
|
||||
|
||||
aSig = extractFloat64Frac( a );
|
||||
aExp = extractFloat64Exp( a );
|
||||
|
@ -3341,9 +3341,9 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
|
|||
|
||||
static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
|
||||
{
|
||||
int16 aExp, bExp, zExp;
|
||||
int_fast16_t aExp, bExp, zExp;
|
||||
uint64_t aSig, bSig, zSig;
|
||||
int16 expDiff;
|
||||
int_fast16_t expDiff;
|
||||
|
||||
aSig = extractFloat64Frac( a );
|
||||
aExp = extractFloat64Exp( a );
|
||||
|
@ -3461,7 +3461,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PARAM )
|
|||
float64 float64_mul( float64 a, float64 b STATUS_PARAM )
|
||||
{
|
||||
flag aSign, bSign, zSign;
|
||||
int16 aExp, bExp, zExp;
|
||||
int_fast16_t aExp, bExp, zExp;
|
||||
uint64_t aSig, bSig, zSig0, zSig1;
|
||||
|
||||
a = float64_squash_input_denormal(a STATUS_VAR);
|
||||
|
@ -3522,7 +3522,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM )
|
|||
float64 float64_div( float64 a, float64 b STATUS_PARAM )
|
||||
{
|
||||
flag aSign, bSign, zSign;
|
||||
int16 aExp, bExp, zExp;
|
||||
int_fast16_t aExp, bExp, zExp;
|
||||
uint64_t aSig, bSig, zSig;
|
||||
uint64_t rem0, rem1;
|
||||
uint64_t term0, term1;
|
||||
|
@ -3594,7 +3594,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM )
|
|||
float64 float64_rem( float64 a, float64 b STATUS_PARAM )
|
||||
{
|
||||
flag aSign, zSign;
|
||||
int16 aExp, bExp, expDiff;
|
||||
int_fast16_t aExp, bExp, expDiff;
|
||||
uint64_t aSig, bSig;
|
||||
uint64_t q, alternateASig;
|
||||
int64_t sigMean;
|
||||
|
@ -3685,7 +3685,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM )
|
|||
float64 float64_muladd(float64 a, float64 b, float64 c, int flags STATUS_PARAM)
|
||||
{
|
||||
flag aSign, bSign, cSign, zSign;
|
||||
int16 aExp, bExp, cExp, pExp, zExp, expDiff;
|
||||
int_fast16_t aExp, bExp, cExp, pExp, zExp, expDiff;
|
||||
uint64_t aSig, bSig, cSig;
|
||||
flag pInf, pZero, pSign;
|
||||
uint64_t pSig0, pSig1, cSig0, cSig1, zSig0, zSig1;
|
||||
|
@ -3900,7 +3900,7 @@ float64 float64_muladd(float64 a, float64 b, float64 c, int flags STATUS_PARAM)
|
|||
float64 float64_sqrt( float64 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp, zExp;
|
||||
int_fast16_t aExp, zExp;
|
||||
uint64_t aSig, zSig, doubleZSig;
|
||||
uint64_t rem0, rem1, term0, term1;
|
||||
a = float64_squash_input_denormal(a STATUS_VAR);
|
||||
|
@ -3951,7 +3951,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM )
|
|||
float64 float64_log2( float64 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign, zSign;
|
||||
int16 aExp;
|
||||
int_fast16_t aExp;
|
||||
uint64_t aSig, aSig0, aSig1, zSig, i;
|
||||
a = float64_squash_input_denormal(a STATUS_VAR);
|
||||
|
||||
|
@ -4428,7 +4428,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM )
|
|||
float128 floatx80_to_float128( floatx80 a STATUS_PARAM )
|
||||
{
|
||||
flag aSign;
|
||||
int16 aExp;
|
||||
int_fast16_t aExp;
|
||||
uint64_t aSig, zSig0, zSig1;
|
||||
|
||||
aSig = extractFloatx80Frac( a );
|
||||
|
|
|
@ -57,9 +57,6 @@ these four paragraphs for those parts of this code that are retained.
|
|||
typedef uint8_t flag;
|
||||
typedef uint8_t uint8;
|
||||
typedef int8_t int8;
|
||||
#ifndef _AIX
|
||||
typedef int int16;
|
||||
#endif
|
||||
typedef unsigned int uint32;
|
||||
typedef signed int int32;
|
||||
typedef uint64_t uint64;
|
||||
|
@ -262,7 +259,7 @@ extern const float16 float16_default_nan;
|
|||
/*----------------------------------------------------------------------------
|
||||
| Software IEC/IEEE single-precision conversion routines.
|
||||
*----------------------------------------------------------------------------*/
|
||||
int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM );
|
||||
int_fast16_t float32_to_int16_round_to_zero(float32 STATUS_PARAM);
|
||||
uint_fast16_t float32_to_uint16_round_to_zero(float32 STATUS_PARAM);
|
||||
int32 float32_to_int32( float32 STATUS_PARAM );
|
||||
int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM );
|
||||
|
@ -366,7 +363,7 @@ extern const float32 float32_default_nan;
|
|||
/*----------------------------------------------------------------------------
|
||||
| Software IEC/IEEE double-precision conversion routines.
|
||||
*----------------------------------------------------------------------------*/
|
||||
int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM );
|
||||
int_fast16_t float64_to_int16_round_to_zero(float64 STATUS_PARAM);
|
||||
uint_fast16_t float64_to_uint16_round_to_zero(float64 STATUS_PARAM);
|
||||
int32 float64_to_int32( float64 STATUS_PARAM );
|
||||
int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM );
|
||||
|
|
Loading…
Reference in New Issue