target-i386: Remove gen_op_ld_T0_A0

Propagate its definition into all users.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2013-11-02 10:30:24 -07:00
parent 4ba9938c89
commit 909be18382
1 changed files with 36 additions and 41 deletions

View File

@ -586,12 +586,6 @@ static inline void gen_op_ld_v(DisasContext *s, int idx, TCGv t0, TCGv a0)
tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE); tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE);
} }
/* XXX: always use ldu or lds */
static inline void gen_op_ld_T0_A0(DisasContext *s, int idx)
{
gen_op_ld_v(s, idx, cpu_T[0], cpu_A0);
}
static inline void gen_op_ldu_T0_A0(DisasContext *s, int idx) static inline void gen_op_ldu_T0_A0(DisasContext *s, int idx)
{ {
gen_op_ld_v(s, idx, cpu_T[0], cpu_A0); gen_op_ld_v(s, idx, cpu_T[0], cpu_A0);
@ -811,7 +805,7 @@ static void gen_check_io(DisasContext *s, int ot, target_ulong cur_eip,
static inline void gen_movs(DisasContext *s, int ot) static inline void gen_movs(DisasContext *s, int ot)
{ {
gen_string_movl_A0_ESI(s); gen_string_movl_A0_ESI(s);
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
gen_string_movl_A0_EDI(s); gen_string_movl_A0_EDI(s);
gen_op_st_T0_A0(s, ot); gen_op_st_T0_A0(s, ot);
gen_op_movl_T0_Dshift(ot); gen_op_movl_T0_Dshift(ot);
@ -1246,7 +1240,7 @@ static inline void gen_stos(DisasContext *s, int ot)
static inline void gen_lods(DisasContext *s, int ot) static inline void gen_lods(DisasContext *s, int ot)
{ {
gen_string_movl_A0_ESI(s); gen_string_movl_A0_ESI(s);
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
gen_op_mov_reg_T0(ot, R_EAX); gen_op_mov_reg_T0(ot, R_EAX);
gen_op_movl_T0_Dshift(ot); gen_op_movl_T0_Dshift(ot);
gen_op_add_reg_T0(s->aflag, R_ESI); gen_op_add_reg_T0(s->aflag, R_ESI);
@ -1297,7 +1291,7 @@ static inline void gen_outs(DisasContext *s, int ot)
if (use_icount) if (use_icount)
gen_io_start(); gen_io_start();
gen_string_movl_A0_ESI(s); gen_string_movl_A0_ESI(s);
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
gen_op_mov_TN_reg(MO_16, 1, R_EDX); gen_op_mov_TN_reg(MO_16, 1, R_EDX);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]);
@ -1417,7 +1411,7 @@ static void gen_op(DisasContext *s1, int op, int ot, int d)
if (d != OR_TMP0) { if (d != OR_TMP0) {
gen_op_mov_TN_reg(ot, 0, d); gen_op_mov_TN_reg(ot, 0, d);
} else { } else {
gen_op_ld_T0_A0(s1, ot); gen_op_ld_v(s1, ot, cpu_T[0], cpu_A0);
} }
switch(op) { switch(op) {
case OP_ADCL: case OP_ADCL:
@ -1501,10 +1495,11 @@ static void gen_op(DisasContext *s1, int op, int ot, int d)
/* if d == OR_TMP0, it means memory operand (address in A0) */ /* if d == OR_TMP0, it means memory operand (address in A0) */
static void gen_inc(DisasContext *s1, int ot, int d, int c) static void gen_inc(DisasContext *s1, int ot, int d, int c)
{ {
if (d != OR_TMP0) if (d != OR_TMP0) {
gen_op_mov_TN_reg(ot, 0, d); gen_op_mov_TN_reg(ot, 0, d);
else } else {
gen_op_ld_T0_A0(s1, ot); gen_op_ld_v(s1, ot, cpu_T[0], cpu_A0);
}
gen_compute_eflags_c(s1, cpu_cc_src); gen_compute_eflags_c(s1, cpu_cc_src);
if (c > 0) { if (c > 0) {
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 1); tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 1);
@ -1572,7 +1567,7 @@ static void gen_shift_rm_T1(DisasContext *s, int ot, int op1,
/* load */ /* load */
if (op1 == OR_TMP0) { if (op1 == OR_TMP0) {
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
} else { } else {
gen_op_mov_TN_reg(ot, 0, op1); gen_op_mov_TN_reg(ot, 0, op1);
} }
@ -1612,7 +1607,7 @@ static void gen_shift_rm_im(DisasContext *s, int ot, int op1, int op2,
/* load */ /* load */
if (op1 == OR_TMP0) if (op1 == OR_TMP0)
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
else else
gen_op_mov_TN_reg(ot, 0, op1); gen_op_mov_TN_reg(ot, 0, op1);
@ -1663,7 +1658,7 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1, int is_right)
/* load */ /* load */
if (op1 == OR_TMP0) { if (op1 == OR_TMP0) {
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
} else { } else {
gen_op_mov_TN_reg(ot, 0, op1); gen_op_mov_TN_reg(ot, 0, op1);
} }
@ -1753,7 +1748,7 @@ static void gen_rot_rm_im(DisasContext *s, int ot, int op1, int op2,
/* load */ /* load */
if (op1 == OR_TMP0) { if (op1 == OR_TMP0) {
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
} else { } else {
gen_op_mov_TN_reg(ot, 0, op1); gen_op_mov_TN_reg(ot, 0, op1);
} }
@ -1835,7 +1830,7 @@ static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1,
/* load */ /* load */
if (op1 == OR_TMP0) if (op1 == OR_TMP0)
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
else else
gen_op_mov_TN_reg(ot, 0, op1); gen_op_mov_TN_reg(ot, 0, op1);
@ -1890,7 +1885,7 @@ static void gen_shiftd_rm_T1(DisasContext *s, int ot, int op1,
/* load */ /* load */
if (op1 == OR_TMP0) { if (op1 == OR_TMP0) {
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
} else { } else {
gen_op_mov_TN_reg(ot, 0, op1); gen_op_mov_TN_reg(ot, 0, op1);
} }
@ -2309,7 +2304,7 @@ static void gen_ldst_modrm(CPUX86State *env, DisasContext *s, int modrm,
gen_op_mov_TN_reg(ot, 0, reg); gen_op_mov_TN_reg(ot, 0, reg);
gen_op_st_T0_A0(s, ot); gen_op_st_T0_A0(s, ot);
} else { } else {
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
if (reg != OR_TMP0) if (reg != OR_TMP0)
gen_op_mov_reg_T0(ot, reg); gen_op_mov_reg_T0(ot, reg);
} }
@ -2589,7 +2584,7 @@ static void gen_pop_T0(DisasContext *s)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
if (CODE64(s)) { if (CODE64(s)) {
gen_op_movq_A0_reg(R_ESP); gen_op_movq_A0_reg(R_ESP);
gen_op_ld_T0_A0(s, s->dflag ? MO_64 : MO_16); gen_op_ld_v(s, s->dflag ? MO_64 : MO_16, cpu_T[0], cpu_A0);
} else } else
#endif #endif
{ {
@ -2601,7 +2596,7 @@ static void gen_pop_T0(DisasContext *s)
gen_op_andl_A0_ffff(); gen_op_andl_A0_ffff();
gen_op_addl_A0_seg(s, R_SS); gen_op_addl_A0_seg(s, R_SS);
} }
gen_op_ld_T0_A0(s, s->dflag + 1); gen_op_ld_v(s, s->dflag + 1, cpu_T[0], cpu_A0);
} }
} }
@ -2660,7 +2655,7 @@ static void gen_popa(DisasContext *s)
for(i = 0;i < 8; i++) { for(i = 0;i < 8; i++) {
/* ESP is not reloaded */ /* ESP is not reloaded */
if (i != 3) { if (i != 3) {
gen_op_ld_T0_A0(s, MO_16 + s->dflag); gen_op_ld_v(s, MO_16 + s->dflag, cpu_T[0], cpu_A0);
gen_op_mov_reg_T0(MO_16 + s->dflag, 7 - i); gen_op_mov_reg_T0(MO_16 + s->dflag, 7 - i);
} }
gen_op_addl_A0_im(2 << s->dflag); gen_op_addl_A0_im(2 << s->dflag);
@ -3346,7 +3341,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
case 0x210: /* movss xmm, ea */ case 0x210: /* movss xmm, ea */
if (mod != 3) { if (mod != 3) {
gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr); gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr);
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0))); tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
gen_op_movl_T0_0(); gen_op_movl_T0_0();
tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(1))); tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)));
@ -3710,7 +3705,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
if ((b >> 8) & 1) { if ((b >> 8) & 1) {
gen_ldq_env_A0(s, offsetof(CPUX86State, xmm_t0.XMM_Q(0))); gen_ldq_env_A0(s, offsetof(CPUX86State, xmm_t0.XMM_Q(0)));
} else { } else {
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0))); tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0)));
} }
op2_offset = offsetof(CPUX86State,xmm_t0); op2_offset = offsetof(CPUX86State,xmm_t0);
@ -4529,7 +4524,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
/* specific case for SSE single instructions */ /* specific case for SSE single instructions */
if (b1 == 2) { if (b1 == 2) {
/* 32 bit access */ /* 32 bit access */
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0))); tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0)));
} else { } else {
/* 64 bit access */ /* 64 bit access */
@ -4933,7 +4928,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
if (op == 0) if (op == 0)
s->rip_offset = insn_const_size(ot); s->rip_offset = insn_const_size(ot);
gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr); gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr);
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
} else { } else {
gen_op_mov_TN_reg(ot, 0, rm); gen_op_mov_TN_reg(ot, 0, rm);
} }
@ -5145,7 +5140,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
if (mod != 3) { if (mod != 3) {
gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr); gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr);
if (op >= 2 && op != 3 && op != 5) if (op >= 2 && op != 3 && op != 5)
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
} else { } else {
gen_op_mov_TN_reg(ot, 0, rm); gen_op_mov_TN_reg(ot, 0, rm);
} }
@ -5768,7 +5763,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
} }
gen_add_A0_ds_seg(s); gen_add_A0_ds_seg(s);
if ((b & 2) == 0) { if ((b & 2) == 0) {
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
gen_op_mov_reg_T0(ot, R_EAX); gen_op_mov_reg_T0(ot, R_EAX);
} else { } else {
gen_op_mov_TN_reg(ot, 0, R_EAX); gen_op_mov_TN_reg(ot, 0, R_EAX);
@ -6011,12 +6006,12 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
switch(op >> 4) { switch(op >> 4) {
case 0: case 0:
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_flds_FT0(cpu_env, cpu_tmp2_i32); gen_helper_flds_FT0(cpu_env, cpu_tmp2_i32);
break; break;
case 1: case 1:
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_fildl_FT0(cpu_env, cpu_tmp2_i32); gen_helper_fildl_FT0(cpu_env, cpu_tmp2_i32);
break; break;
@ -6050,12 +6045,12 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
case 0: case 0:
switch(op >> 4) { switch(op >> 4) {
case 0: case 0:
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_flds_ST0(cpu_env, cpu_tmp2_i32); gen_helper_flds_ST0(cpu_env, cpu_tmp2_i32);
break; break;
case 1: case 1:
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_fildl_ST0(cpu_env, cpu_tmp2_i32); gen_helper_fildl_ST0(cpu_env, cpu_tmp2_i32);
break; break;
@ -6129,7 +6124,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_helper_fldenv(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); gen_helper_fldenv(cpu_env, cpu_A0, tcg_const_i32(s->dflag));
break; break;
case 0x0d: /* fldcw mem */ case 0x0d: /* fldcw mem */
gen_op_ld_T0_A0(s, MO_16); gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_fldcw(cpu_env, cpu_tmp2_i32); gen_helper_fldcw(cpu_env, cpu_tmp2_i32);
break; break;
@ -6736,7 +6731,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
} else { } else {
gen_stack_A0(s); gen_stack_A0(s);
/* pop offset */ /* pop offset */
gen_op_ld_T0_A0(s, 1 + s->dflag); gen_op_ld_v(s, 1 + s->dflag, cpu_T[0], cpu_A0);
if (s->dflag == 0) if (s->dflag == 0)
gen_op_andl_T0_ffff(); gen_op_andl_T0_ffff();
/* NOTE: keeping EIP updated is not a problem in case of /* NOTE: keeping EIP updated is not a problem in case of
@ -6744,7 +6739,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_op_jmp_T0(); gen_op_jmp_T0();
/* pop selector */ /* pop selector */
gen_op_addl_A0_im(2 << s->dflag); gen_op_addl_A0_im(2 << s->dflag);
gen_op_ld_T0_A0(s, 1 + s->dflag); gen_op_ld_v(s, 1 + s->dflag, cpu_T[0], cpu_A0);
gen_op_movl_seg_T0_vm(R_CS); gen_op_movl_seg_T0_vm(R_CS);
/* add stack offset */ /* add stack offset */
gen_stack_update(s, val + (4 << s->dflag)); gen_stack_update(s, val + (4 << s->dflag));
@ -6991,7 +6986,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
if (mod != 3) { if (mod != 3) {
s->rip_offset = 1; s->rip_offset = 1;
gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr); gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr);
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
} else { } else {
gen_op_mov_TN_reg(ot, 0, rm); gen_op_mov_TN_reg(ot, 0, rm);
} }
@ -7027,7 +7022,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
tcg_gen_sari_tl(cpu_tmp0, cpu_T[1], 3 + ot); tcg_gen_sari_tl(cpu_tmp0, cpu_T[1], 3 + ot);
tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, ot); tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, ot);
tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0); tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
gen_op_ld_T0_A0(s, ot); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
} else { } else {
gen_op_mov_TN_reg(ot, 0, rm); gen_op_mov_TN_reg(ot, 0, rm);
} }
@ -7692,7 +7687,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr); gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr);
gen_op_ld_T1_A0(s, MO_16); gen_op_ld_T1_A0(s, MO_16);
gen_add_A0_im(s, 2); gen_add_A0_im(s, 2);
gen_op_ld_T0_A0(s, CODE64(s) + MO_32); gen_op_ld_v(s, CODE64(s) + MO_32, cpu_T[0], cpu_A0);
if (!s->dflag) if (!s->dflag)
gen_op_andl_T0_im(0xffffff); gen_op_andl_T0_im(0xffffff);
if (op == 2) { if (op == 2) {
@ -7814,7 +7809,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
if (d_ot == MO_64) { if (d_ot == MO_64) {
gen_op_lds_T0_A0(s, MO_32); gen_op_lds_T0_A0(s, MO_32);
} else { } else {
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
} }
gen_op_mov_reg_T0(d_ot, reg); gen_op_mov_reg_T0(d_ot, reg);
} }
@ -8062,7 +8057,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
goto illegal_op; goto illegal_op;
gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr); gen_lea_modrm(env, s, modrm, &reg_addr, &offset_addr);
if (op == 2) { if (op == 2) {
gen_op_ld_T0_A0(s, MO_32); gen_op_ld_v(s, MO_32, cpu_T[0], cpu_A0);
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
gen_helper_ldmxcsr(cpu_env, cpu_tmp2_i32); gen_helper_ldmxcsr(cpu_env, cpu_tmp2_i32);
} else { } else {