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Allocate register pair for 64-bit registers on 32-bit host. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4730 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-06-11 11:03:34 +00:00
parent 9843a0d2c6
commit 8df1ca4ba5
1 changed files with 2 additions and 2 deletions
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4
tcg/tcg.c
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@ -423,7 +423,7 @@ TCGv tcg_temp_new_internal(TCGType type, int temp_local)
idx = s->nb_temps; idx = s->nb_temps;
#if TCG_TARGET_REG_BITS == 32 #if TCG_TARGET_REG_BITS == 32
if (type == TCG_TYPE_I64) { if (type == TCG_TYPE_I64) {
tcg_temp_alloc(s, s->nb_temps + 1); tcg_temp_alloc(s, s->nb_temps + 2);
ts = &s->temps[s->nb_temps]; ts = &s->temps[s->nb_temps];
ts->base_type = type; ts->base_type = type;
ts->type = TCG_TYPE_I32; ts->type = TCG_TYPE_I32;
@ -1961,7 +1961,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
break; break;
} }
args += def->nb_args; args += def->nb_args;
next: ; next:
if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) { if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
return op_index; return op_index;
} }