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target/mips: Add disassembler support for nanoMIPS 

Add disassembler support for nanoMIPS.

Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Matthew Fortune <matthew.fortune@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
This commit is contained in:
Aleksandar Markovic 2018-10-24 17:41:49 +02:00
parent d046a9ea1b
commit 89a955e8df
8 changed files with 23360 additions and 2 deletions
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2
MAINTAINERS
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@ -202,6 +202,8 @@ F: include/hw/intc/mips_gic.h
F: include/hw/timer/mips_gictimer.h F: include/hw/timer/mips_gictimer.h
F: tests/tcg/mips/ F: tests/tcg/mips/
F: disas/mips.c F: disas/mips.c
F: disas/nanomips.h
F: disas/nanomips.cpp
Moxie Moxie
M: Anthony Green <green@moxielogic.com> M: Anthony Green <green@moxielogic.com>

3
configure vendored
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@ -7264,6 +7264,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
;; ;;
mips*) mips*)
disas_config "MIPS" disas_config "MIPS"
if test -n "${cxx}"; then
disas_config "NANOMIPS"
fi
;; ;;
moxie*) moxie*)
disas_config "MOXIE" disas_config "MOXIE"

1
disas/Makefile.objs
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@ -14,6 +14,7 @@ common-obj-$(CONFIG_I386_DIS) += i386.o
common-obj-$(CONFIG_M68K_DIS) += m68k.o common-obj-$(CONFIG_M68K_DIS) += m68k.o
common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o
common-obj-$(CONFIG_MIPS_DIS) += mips.o common-obj-$(CONFIG_MIPS_DIS) += mips.o
common-obj-$(CONFIG_NANOMIPS_DIS) += nanomips.o
common-obj-$(CONFIG_NIOS2_DIS) += nios2.o common-obj-$(CONFIG_NIOS2_DIS) += nios2.o
common-obj-$(CONFIG_MOXIE_DIS) += moxie.o common-obj-$(CONFIG_MOXIE_DIS) += moxie.o
common-obj-$(CONFIG_PPC_DIS) += ppc.o common-obj-$(CONFIG_PPC_DIS) += ppc.o

22242
disas/nanomips.cpp Normal file
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File diff suppressed because it is too large Load Diff

1099
disas/nanomips.h Normal file
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File diff suppressed because it is too large Load Diff

1
include/disas/bfd.h
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@ -387,6 +387,7 @@ typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
int print_insn_tci(bfd_vma, disassemble_info*); int print_insn_tci(bfd_vma, disassemble_info*);
int print_insn_big_mips (bfd_vma, disassemble_info*); int print_insn_big_mips (bfd_vma, disassemble_info*);
int print_insn_little_mips (bfd_vma, disassemble_info*); int print_insn_little_mips (bfd_vma, disassemble_info*);
int print_insn_nanomips (bfd_vma, disassemble_info*);
int print_insn_i386 (bfd_vma, disassemble_info*); int print_insn_i386 (bfd_vma, disassemble_info*);
int print_insn_m68k (bfd_vma, disassemble_info*); int print_insn_m68k (bfd_vma, disassemble_info*);
int print_insn_z8001 (bfd_vma, disassemble_info*); int print_insn_z8001 (bfd_vma, disassemble_info*);

1
include/exec/poison.h
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@ -75,6 +75,7 @@
#pragma GCC poison CONFIG_M68K_DIS #pragma GCC poison CONFIG_M68K_DIS
#pragma GCC poison CONFIG_MICROBLAZE_DIS #pragma GCC poison CONFIG_MICROBLAZE_DIS
#pragma GCC poison CONFIG_MIPS_DIS #pragma GCC poison CONFIG_MIPS_DIS
#pragma GCC poison CONFIG_NANOMIPS_DIS
#pragma GCC poison CONFIG_MOXIE_DIS #pragma GCC poison CONFIG_MOXIE_DIS
#pragma GCC poison CONFIG_NIOS2_DIS #pragma GCC poison CONFIG_NIOS2_DIS
#pragma GCC poison CONFIG_PPC_DIS #pragma GCC poison CONFIG_PPC_DIS

13
target/mips/cpu.c
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@ -113,11 +113,20 @@ static void mips_cpu_reset(CPUState *s)
} }
static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) { static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) {
MIPSCPU *cpu = MIPS_CPU(s);
CPUMIPSState *env = &cpu->env;
if (!(env->insn_flags & ISA_NANOMIPS32)) {
#ifdef TARGET_WORDS_BIGENDIAN #ifdef TARGET_WORDS_BIGENDIAN
info->print_insn = print_insn_big_mips; info->print_insn = print_insn_big_mips;
#else #else
info->print_insn = print_insn_little_mips; info->print_insn = print_insn_little_mips;
#endif #endif
} else {
#if defined(CONFIG_NANOMIPS_DIS)
info->print_insn = print_insn_nanomips;
#endif
}
} }
static void mips_cpu_realizefn(DeviceState *dev, Error **errp) static void mips_cpu_realizefn(DeviceState *dev, Error **errp)