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tcg-ppc: Don't implement rem 

Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2013-03-11 23:24:15 -07:00
parent 5e1108b370
commit 865a4671f9
2 changed files with 1 additions and 15 deletions
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14
tcg/ppc/tcg-target.c
View File

@ -1671,18 +1671,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out32 (s, DIVWU | TAB (args[0], args[1], args[2]));
break;
case INDEX_op_rem_i32:
tcg_out32 (s, DIVW | TAB (0, args[1], args[2]));
tcg_out32 (s, MULLW | TAB (0, 0, args[2]));
tcg_out32 (s, SUBF | TAB (args[0], 0, args[1]));
break;
case INDEX_op_remu_i32:
tcg_out32 (s, DIVWU | TAB (0, args[1], args[2]));
tcg_out32 (s, MULLW | TAB (0, 0, args[2]));
tcg_out32 (s, SUBF | TAB (args[0], 0, args[1]));
break;
case INDEX_op_mulu2_i32:
if (args[0] == args[2] || args[0] == args[3]) {
tcg_out32 (s, MULLW | TAB (0, args[2], args[3]));
@ -1992,8 +1980,6 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_mul_i32, { "r", "r", "ri" } },
{ INDEX_op_div_i32, { "r", "r", "r" } },
{ INDEX_op_divu_i32, { "r", "r", "r" } },
{ INDEX_op_rem_i32, { "r", "r", "r" } },
{ INDEX_op_remu_i32, { "r", "r", "r" } },
{ INDEX_op_mulu2_i32, { "r", "r", "r", "r" } },
{ INDEX_op_sub_i32, { "r", "r", "ri" } },
{ INDEX_op_and_i32, { "r", "r", "ri" } },

2
tcg/ppc/tcg-target.h
View File

@ -78,7 +78,7 @@ typedef enum {
/* optional instructions */
#define TCG_TARGET_HAS_div_i32 1
#define TCG_TARGET_HAS_rem_i32 1
#define TCG_TARGET_HAS_rem_i32 0
#define TCG_TARGET_HAS_rot_i32 1
#define TCG_TARGET_HAS_ext8s_i32 1
#define TCG_TARGET_HAS_ext16s_i32 1