mirror of https://github.com/xqemu/xqemu.git
integrator/cp: Implement CARDIN and WPROT signals
This allows to use the SD card emulation of the board: Forward the signals from the pl181 top the CP control register emulation, report the current state via CP_INTREG, deliver CARDIN IRQ to the secondary interrupt controller and also support clearing that line via CP_INTREG. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Message-id: c55d9fb28d19ec83625cb0074b3b6f2e5958caf6.1426004843.git.jan.kiszka@siemens.com Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -416,18 +416,29 @@ typedef struct ICPCtrlRegsState {
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/*< public >*/
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/*< public >*/
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MemoryRegion iomem;
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MemoryRegion iomem;
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qemu_irq mmc_irq;
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uint32_t intreg_state;
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} ICPCtrlRegsState;
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} ICPCtrlRegsState;
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#define ICP_GPIO_MMC_WPROT "mmc-wprot"
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#define ICP_GPIO_MMC_CARDIN "mmc-cardin"
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#define ICP_INTREG_WPROT (1 << 0)
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#define ICP_INTREG_CARDIN (1 << 3)
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static uint64_t icp_control_read(void *opaque, hwaddr offset,
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static uint64_t icp_control_read(void *opaque, hwaddr offset,
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unsigned size)
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unsigned size)
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{
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{
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ICPCtrlRegsState *s = opaque;
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switch (offset >> 2) {
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switch (offset >> 2) {
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case 0: /* CP_IDFIELD */
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case 0: /* CP_IDFIELD */
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return 0x41034003;
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return 0x41034003;
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case 1: /* CP_FLASHPROG */
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case 1: /* CP_FLASHPROG */
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return 0;
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return 0;
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case 2: /* CP_INTREG */
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case 2: /* CP_INTREG */
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return 0;
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return s->intreg_state;
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case 3: /* CP_DECODE */
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case 3: /* CP_DECODE */
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return 0x11;
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return 0x11;
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default:
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default:
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@ -439,9 +450,14 @@ static uint64_t icp_control_read(void *opaque, hwaddr offset,
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static void icp_control_write(void *opaque, hwaddr offset,
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static void icp_control_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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uint64_t value, unsigned size)
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{
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{
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ICPCtrlRegsState *s = opaque;
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switch (offset >> 2) {
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switch (offset >> 2) {
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case 1: /* CP_FLASHPROG */
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case 2: /* CP_INTREG */
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case 2: /* CP_INTREG */
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s->intreg_state &= ~(value & ICP_INTREG_CARDIN);
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qemu_set_irq(s->mmc_irq, !!(s->intreg_state & ICP_INTREG_CARDIN));
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break;
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case 1: /* CP_FLASHPROG */
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case 3: /* CP_DECODE */
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case 3: /* CP_DECODE */
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/* Nothing interesting implemented yet. */
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/* Nothing interesting implemented yet. */
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break;
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break;
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@ -456,14 +472,41 @@ static const MemoryRegionOps icp_control_ops = {
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.endianness = DEVICE_NATIVE_ENDIAN,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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};
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static void icp_control_mmc_wprot(void *opaque, int line, int level)
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{
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ICPCtrlRegsState *s = opaque;
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s->intreg_state &= ~ICP_INTREG_WPROT;
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if (level) {
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s->intreg_state |= ICP_INTREG_WPROT;
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}
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}
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static void icp_control_mmc_cardin(void *opaque, int line, int level)
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{
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ICPCtrlRegsState *s = opaque;
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/* line is released by writing to CP_INTREG */
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if (level) {
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s->intreg_state |= ICP_INTREG_CARDIN;
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qemu_set_irq(s->mmc_irq, 1);
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}
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}
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static void icp_control_init(Object *obj)
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static void icp_control_init(Object *obj)
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{
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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ICPCtrlRegsState *s = ICP_CONTROL_REGS(obj);
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ICPCtrlRegsState *s = ICP_CONTROL_REGS(obj);
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DeviceState *dev = DEVICE(obj);
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memory_region_init_io(&s->iomem, OBJECT(s), &icp_control_ops, s,
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memory_region_init_io(&s->iomem, OBJECT(s), &icp_control_ops, s,
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"icp_ctrl_regs", 0x00800000);
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"icp_ctrl_regs", 0x00800000);
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sysbus_init_mmio(sbd, &s->iomem);
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sysbus_init_mmio(sbd, &s->iomem);
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qdev_init_gpio_in_named(dev, icp_control_mmc_wprot, ICP_GPIO_MMC_WPROT, 1);
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qdev_init_gpio_in_named(dev, icp_control_mmc_cardin,
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ICP_GPIO_MMC_CARDIN, 1);
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sysbus_init_irq(sbd, &s->mmc_irq);
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}
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}
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@ -488,7 +531,7 @@ static void integratorcp_init(MachineState *machine)
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
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MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
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qemu_irq pic[32];
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qemu_irq pic[32];
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DeviceState *dev;
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DeviceState *dev, *sic, *icp;
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int i;
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int i;
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Error *err = NULL;
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Error *err = NULL;
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@ -546,17 +589,24 @@ static void integratorcp_init(MachineState *machine)
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for (i = 0; i < 32; i++) {
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for (i = 0; i < 32; i++) {
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pic[i] = qdev_get_gpio_in(dev, i);
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pic[i] = qdev_get_gpio_in(dev, i);
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}
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}
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sysbus_create_simple(TYPE_INTEGRATOR_PIC, 0xca000000, pic[26]);
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sic = sysbus_create_simple(TYPE_INTEGRATOR_PIC, 0xca000000, pic[26]);
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sysbus_create_varargs("integrator_pit", 0x13000000,
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sysbus_create_varargs("integrator_pit", 0x13000000,
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pic[5], pic[6], pic[7], NULL);
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pic[5], pic[6], pic[7], NULL);
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sysbus_create_simple("pl031", 0x15000000, pic[8]);
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sysbus_create_simple("pl031", 0x15000000, pic[8]);
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sysbus_create_simple("pl011", 0x16000000, pic[1]);
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sysbus_create_simple("pl011", 0x16000000, pic[1]);
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sysbus_create_simple("pl011", 0x17000000, pic[2]);
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sysbus_create_simple("pl011", 0x17000000, pic[2]);
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sysbus_create_simple(TYPE_ICP_CONTROL_REGS, 0xcb000000, NULL);
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icp = sysbus_create_simple(TYPE_ICP_CONTROL_REGS, 0xcb000000,
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qdev_get_gpio_in(sic, 3));
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sysbus_create_simple("pl050_keyboard", 0x18000000, pic[3]);
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sysbus_create_simple("pl050_keyboard", 0x18000000, pic[3]);
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sysbus_create_simple("pl050_mouse", 0x19000000, pic[4]);
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sysbus_create_simple("pl050_mouse", 0x19000000, pic[4]);
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sysbus_create_simple(TYPE_INTEGRATOR_DEBUG, 0x1a000000, 0);
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sysbus_create_simple(TYPE_INTEGRATOR_DEBUG, 0x1a000000, 0);
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sysbus_create_varargs("pl181", 0x1c000000, pic[23], pic[24], NULL);
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dev = sysbus_create_varargs("pl181", 0x1c000000, pic[23], pic[24], NULL);
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qdev_connect_gpio_out(dev, 0,
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qdev_get_gpio_in_named(icp, ICP_GPIO_MMC_WPROT, 0));
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qdev_connect_gpio_out(dev, 1,
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qdev_get_gpio_in_named(icp, ICP_GPIO_MMC_CARDIN, 0));
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if (nd_table[0].used)
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if (nd_table[0].used)
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smc91c111_init(&nd_table[0], 0xc8000000, pic[27]);
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smc91c111_init(&nd_table[0], 0xc8000000, pic[27]);
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