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target-alpha: Copy implver to DisasContext 

Which allows removing env from DisasContext.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Richard Henderson 2013-07-01 13:19:30 -07:00 committed by Andreas Färber
parent ca6862a67f
commit 801c4c287b
1 changed files with 7 additions and 4 deletions
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11
target-alpha/translate.c
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@ -38,7 +38,6 @@
typedef struct DisasContext DisasContext; typedef struct DisasContext DisasContext;
struct DisasContext { struct DisasContext {
struct TranslationBlock *tb; struct TranslationBlock *tb;
CPUAlphaState *env;
uint64_t pc; uint64_t pc;
int mem_idx; int mem_idx;
@ -47,6 +46,9 @@ struct DisasContext {
/* Current flush-to-zero setting for this TB. */ /* Current flush-to-zero setting for this TB. */
int tb_ftz; int tb_ftz;
/* implver value for this CPU. */
int implver;
bool singlestep_enabled; bool singlestep_enabled;
}; };
@ -2250,8 +2252,9 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break; break;
case 0x6C: case 0x6C:
/* IMPLVER */ /* IMPLVER */
if (rc != 31) if (rc != 31) {
tcg_gen_movi_i64(cpu_ir[rc], ctx->env->implver); tcg_gen_movi_i64(cpu_ir[rc], ctx->implver);
}
break; break;
default: default:
goto invalid_opc; goto invalid_opc;
@ -3400,9 +3403,9 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
ctx.tb = tb; ctx.tb = tb;
ctx.env = env;
ctx.pc = pc_start; ctx.pc = pc_start;
ctx.mem_idx = cpu_mmu_index(env); ctx.mem_idx = cpu_mmu_index(env);
ctx.implver = env->implver;
ctx.singlestep_enabled = env->singlestep_enabled; ctx.singlestep_enabled = env->singlestep_enabled;
/* ??? Every TB begins with unset rounding mode, to be initialized on /* ??? Every TB begins with unset rounding mode, to be initialized on