mirror of https://github.com/xqemu/xqemu.git
i8259 PIC support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1486 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1,79 +1,23 @@
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#include "vl.h"
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#define DEBUG_IRQ_COUNT
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#define BIOS_FILENAME "mips_bios.bin"
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//#define BIOS_FILENAME "system.bin"
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#define KERNEL_LOAD_ADDR 0x80010000
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#define INITRD_LOAD_ADDR 0x80800000
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/* MIPS R4K IRQ controler */
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#if defined(DEBUG_IRQ_COUNT)
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static uint64_t irq_count[16];
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#endif
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extern FILE *logfile;
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void mips_set_irq (int n_IRQ, int level)
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static void pic_irq_request(void *opaque, int level)
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{
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uint32_t mask;
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if (n_IRQ < 0 || n_IRQ >= 8)
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return;
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mask = 0x100 << n_IRQ;
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if (level != 0) {
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#if 1
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if (logfile) {
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fprintf(logfile, "%s n %d l %d mask %08x %08x\n",
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__func__, n_IRQ, level, mask, cpu_single_env->CP0_Status);
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}
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#endif
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cpu_single_env->CP0_Cause |= mask;
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if ((cpu_single_env->CP0_Status & 0x00000001) &&
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(cpu_single_env->CP0_Status & mask)) {
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#if defined(DEBUG_IRQ_COUNT)
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irq_count[n_IRQ]++;
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#endif
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#if 1
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if (logfile)
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fprintf(logfile, "%s raise IRQ\n", __func__);
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#endif
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cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
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}
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if (level) {
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cpu_single_env->CP0_Cause |= 0x00000400;
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cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
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} else {
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cpu_single_env->CP0_Cause &= ~mask;
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cpu_single_env->CP0_Cause &= ~0x00000400;
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cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
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}
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}
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void pic_set_irq (int n_IRQ, int level)
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{
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mips_set_irq(n_IRQ + 2, level);
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}
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void pic_info (void)
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{
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term_printf("IRQ asserted: %02x mask: %02x\n",
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(cpu_single_env->CP0_Cause >> 8) & 0xFF,
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(cpu_single_env->CP0_Status >> 8) & 0xFF);
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}
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void irq_info (void)
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{
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#if !defined(DEBUG_IRQ_COUNT)
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term_printf("irq statistic code not compiled.\n");
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#else
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int i;
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int64_t count;
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term_printf("IRQ statistics:\n");
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for (i = 0; i < 8; i++) {
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count = irq_count[i];
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if (count > 0)
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term_printf("%2d: %lld\n", i, count);
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}
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#endif
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}
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void cpu_mips_irqctrl_init (void)
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{
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}
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@ -295,6 +239,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
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cpu_register_physical_memory(0x14000000, 0x00010000, io_memory);
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isa_mem_base = 0x10000000;
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isa_pic = pic_init(pic_irq_request, cpu_single_env);
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serial_init(0x3f8, 4, serial_hds[0]);
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vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size,
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vga_ram_size);
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