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target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode 

In the ARM ldr/str decode path, rather than directly testing
"insn & (1 << 21)" and "insn & (1 << 24)", abstract these
bits out into wbit and pbit local flags. (We will want to
do more tests against them to determine whether we need to
provide syndrome information.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
Peter Maydell 2017-02-07 18:29:59 +00:00
parent 4061200059
commit 63f26fcfda
1 changed files with 6 additions and 3 deletions
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9
target/arm/translate.c
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@ -8782,6 +8782,8 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
} else {
int address_offset;
bool load = insn & (1 << 20);
bool wbit = insn & (1 << 21);
bool pbit = insn & (1 << 24);
bool doubleword = false;
/* Misc load/store */
rn = (insn >> 16) & 0xf;
@ -8799,8 +8801,9 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
}
addr = load_reg(s, rn);
if (insn & (1 << 24))
if (pbit) {
gen_add_datah_offset(s, insn, 0, addr);
}
address_offset = 0;
if (doubleword) {
@ -8849,10 +8852,10 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
ensure correct behavior with overlapping index registers.
ldrd with base writeback is undefined if the
destination and index registers overlap. */
if (!(insn & (1 << 24))) {
if (!pbit) {
gen_add_datah_offset(s, insn, address_offset, addr);
store_reg(s, rn, addr);
} else if (insn & (1 << 21)) {
} else if (wbit) {
if (address_offset)
tcg_gen_addi_i32(addr, addr, address_offset);
store_reg(s, rn, addr);