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parallel: convert to memory API 

Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Avi Kivity 2011-10-06 16:44:26 +02:00
parent c601785091
commit 63858cd992
3 changed files with 16 additions and 17 deletions
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3
hw/mips_jazz.c
View File

@ -274,7 +274,8 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Parallel port */ /* Parallel port */
if (parallel_hds[0]) if (parallel_hds[0])
parallel_mm_init(0x80008000, 0, rc4030[0], parallel_hds[0]); parallel_mm_init(address_space, 0x80008000, 0, rc4030[0],
parallel_hds[0]);
/* Sound card */ /* Sound card */
/* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */ /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */

27
hw/parallel.c
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@ -65,6 +65,7 @@
#define PARA_CTR_SIGNAL (PARA_CTR_SELECT|PARA_CTR_INIT|PARA_CTR_AUTOLF|PARA_CTR_STROBE) #define PARA_CTR_SIGNAL (PARA_CTR_SELECT|PARA_CTR_INIT|PARA_CTR_AUTOLF|PARA_CTR_STROBE)
typedef struct ParallelState { typedef struct ParallelState {
MemoryRegion iomem;
uint8_t dataw; uint8_t dataw;
uint8_t datar; uint8_t datar;
uint8_t status; uint8_t status;
@ -555,24 +556,20 @@ static void parallel_mm_writel (void *opaque,
parallel_ioport_write_sw(s, addr >> s->it_shift, value); parallel_ioport_write_sw(s, addr >> s->it_shift, value);
} }
static CPUReadMemoryFunc * const parallel_mm_read_sw[] = { static const MemoryRegionOps parallel_mm_ops = {
&parallel_mm_readb, .old_mmio = {
&parallel_mm_readw, .read = { parallel_mm_readb, parallel_mm_readw, parallel_mm_readl },
&parallel_mm_readl, .write = { parallel_mm_writeb, parallel_mm_writew, parallel_mm_writel },
}; },
.endianness = DEVICE_NATIVE_ENDIAN,
static CPUWriteMemoryFunc * const parallel_mm_write_sw[] = {
&parallel_mm_writeb,
&parallel_mm_writew,
&parallel_mm_writel,
}; };
/* If fd is zero, it means that the parallel device uses the console */ /* If fd is zero, it means that the parallel device uses the console */
bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, bool parallel_mm_init(MemoryRegion *address_space,
target_phys_addr_t base, int it_shift, qemu_irq irq,
CharDriverState *chr) CharDriverState *chr)
{ {
ParallelState *s; ParallelState *s;
int io_sw;
s = g_malloc0(sizeof(ParallelState)); s = g_malloc0(sizeof(ParallelState));
s->irq = irq; s->irq = irq;
@ -580,9 +577,9 @@ bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
s->it_shift = it_shift; s->it_shift = it_shift;
qemu_register_reset(parallel_reset, s); qemu_register_reset(parallel_reset, s);
io_sw = cpu_register_io_memory(parallel_mm_read_sw, parallel_mm_write_sw, memory_region_init_io(&s->iomem, &parallel_mm_ops, s,
s, DEVICE_NATIVE_ENDIAN); "parallel", 8 << it_shift);
cpu_register_physical_memory(base, 8 << it_shift, io_sw); memory_region_add_subregion(address_space, base, &s->iomem);
return true; return true;
} }

3
hw/pc.h
View File

@ -55,7 +55,8 @@ static inline bool parallel_init(int index, CharDriverState *chr)
return true; return true;
} }
bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, bool parallel_mm_init(MemoryRegion *address_space,
target_phys_addr_t base, int it_shift, qemu_irq irq,
CharDriverState *chr); CharDriverState *chr);
/* i8259.c */ /* i8259.c */