ShuriZma
/
xqemu
mirror of https://github.com/xqemu/xqemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

target/sh4: fix BS_EXCP exit 

In case of exception, there is no need to call tcg_gen_exit_tb as the
exception helper won't return.

Also fix a few cases where BS_BRANCH is called instead of BS_EXCP.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2017-05-01 23:20:43 +02:00
parent 0fc37a8b0c
commit 632056651a
1 changed files with 7 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
target/sh4/translate.c
View File

@ -339,7 +339,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg)
if (ctx->envflags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { \ if (ctx->envflags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { \
tcg_gen_movi_i32(cpu_pc, ctx->pc); \ tcg_gen_movi_i32(cpu_pc, ctx->pc); \
gen_helper_raise_slot_illegal_instruction(cpu_env); \ gen_helper_raise_slot_illegal_instruction(cpu_env); \
ctx->bstate = BS_BRANCH; \ ctx->bstate = BS_EXCP; \
return; \ return; \
} }
@ -351,7 +351,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg)
} else { \ } else { \
gen_helper_raise_illegal_instruction(cpu_env); \ gen_helper_raise_illegal_instruction(cpu_env); \
} \ } \
ctx->bstate = BS_BRANCH; \ ctx->bstate = BS_EXCP; \
return; \ return; \
} }
@ -363,7 +363,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg)
} else { \ } else { \
gen_helper_raise_fpu_disable(cpu_env); \ gen_helper_raise_fpu_disable(cpu_env); \
} \ } \
ctx->bstate = BS_BRANCH; \ ctx->bstate = BS_EXCP; \
return; \ return; \
} }
@ -1289,7 +1289,7 @@ static void _decode_opc(DisasContext * ctx)
imm = tcg_const_i32(B7_0); imm = tcg_const_i32(B7_0);
gen_helper_trapa(cpu_env, imm); gen_helper_trapa(cpu_env, imm);
tcg_temp_free(imm); tcg_temp_free(imm);
ctx->bstate = BS_BRANCH; ctx->bstate = BS_EXCP;
} }
return; return;
case 0xc800: /* tst #imm,R0 */ case 0xc800: /* tst #imm,R0 */
@ -1798,7 +1798,7 @@ static void _decode_opc(DisasContext * ctx)
} else { } else {
gen_helper_raise_illegal_instruction(cpu_env); gen_helper_raise_illegal_instruction(cpu_env);
} }
ctx->bstate = BS_BRANCH; ctx->bstate = BS_EXCP;
} }
static void decode_opc(DisasContext * ctx) static void decode_opc(DisasContext * ctx)
@ -1867,7 +1867,7 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb)
/* We have hit a breakpoint - make sure PC is up-to-date */ /* We have hit a breakpoint - make sure PC is up-to-date */
tcg_gen_movi_i32(cpu_pc, ctx.pc); tcg_gen_movi_i32(cpu_pc, ctx.pc);
gen_helper_debug(cpu_env); gen_helper_debug(cpu_env);
ctx.bstate = BS_BRANCH; ctx.bstate = BS_EXCP;
/* The address covered by the breakpoint must be included in /* The address covered by the breakpoint must be included in
[tb->pc, tb->pc + tb->size) in order to for it to be [tb->pc, tb->pc + tb->size) in order to for it to be
properly cleared -- thus we increment the PC here so that properly cleared -- thus we increment the PC here so that
@ -1911,9 +1911,7 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb)
gen_goto_tb(&ctx, 0, ctx.pc); gen_goto_tb(&ctx, 0, ctx.pc);
break; break;
case BS_EXCP: case BS_EXCP:
/* gen_op_interrupt_restart(); */ /* fall through */
tcg_gen_exit_tb(0);
break;
case BS_BRANCH: case BS_BRANCH:
default: default:
break; break;