mirror of https://github.com/xqemu/xqemu.git
armv7m: Make ARMv7M object take memory region link
Make the ARMv7M object take a memory region link which it uses to wire up the bitband rather than having them always put themselves in the system address space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1487604965-23220-6-git-send-email-peter.maydell@linaro.org
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@ -18,6 +18,7 @@
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#include "elf.h"
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#include "sysemu/qtest.h"
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#include "qemu/error-report.h"
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#include "exec/address-spaces.h"
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/* Bitbanded IO. Each word corresponds to a single bit. */
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@ -148,6 +149,14 @@ static void armv7m_instance_init(Object *obj)
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/* Can't init the cpu here, we don't yet know which model to use */
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object_property_add_link(obj, "memory",
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TYPE_MEMORY_REGION,
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(Object **)&s->board_memory,
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qdev_prop_allow_set_link_before_realize,
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OBJ_PROP_LINK_UNREF_ON_RELEASE,
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&error_abort);
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memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
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object_initialize(&s->nvic, sizeof(s->nvic), "armv7m_nvic");
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qdev_set_parent_bus(DEVICE(&s->nvic), sysbus_get_default());
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object_property_add_alias(obj, "num-irq",
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@ -169,6 +178,13 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
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const char *typename;
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CPUClass *cc;
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if (!s->board_memory) {
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error_setg(errp, "memory property was not set");
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return;
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}
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memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
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cpustr = g_strsplit(s->cpu_model, ",", 2);
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oc = cpu_class_by_name(TYPE_ARM_CPU, cpustr[0]);
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@ -193,6 +209,8 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
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return;
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}
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object_property_set_link(OBJECT(s->cpu), OBJECT(&s->container), "memory",
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&error_abort);
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object_property_set_bool(OBJECT(s->cpu), true, "realized", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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@ -233,7 +251,8 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
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return;
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}
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sysbus_mmio_map(sbd, 0, bitband_output_addr[i]);
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memory_region_add_subregion(&s->container, bitband_output_addr[i],
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sysbus_mmio_get_region(sbd, 0));
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}
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}
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@ -281,6 +300,8 @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
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armv7m = qdev_create(NULL, "armv7m");
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qdev_prop_set_uint32(armv7m, "num-irq", num_irq);
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qdev_prop_set_string(armv7m, "cpu-model", cpu_model);
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object_property_set_link(OBJECT(armv7m), OBJECT(get_system_memory()),
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"memory", &error_abort);
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/* This will exit with an error if the user passed us a bad cpu_model */
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qdev_init_nofail(armv7m);
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@ -35,6 +35,9 @@ typedef struct {
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* + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ
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* + Property "cpu-model": CPU model to instantiate
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* + Property "num-irq": number of external IRQ lines
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* + Property "memory": MemoryRegion defining the physical address space
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* that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
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* devices will be automatically layered on top of this view.)
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*/
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typedef struct ARMv7MState {
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/*< private >*/
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@ -44,8 +47,15 @@ typedef struct ARMv7MState {
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BitBandState bitband[ARMV7M_NUM_BITBANDS];
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ARMCPU *cpu;
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/* MemoryRegion we pass to the CPU, with our devices layered on
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* top of the ones the board provides in board_memory.
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*/
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MemoryRegion container;
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/* Properties */
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char *cpu_model;
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/* MemoryRegion the board provides to us (with its devices, RAM, etc) */
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MemoryRegion *board_memory;
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} ARMv7MState;
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#endif
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