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target-s390: Convert RRBE 

Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2012-08-27 09:22:13 -07:00
parent 2bbde27f25
commit 5cc69c54f6
4 changed files with 14 additions and 14 deletions
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2
target-s390x/helper.h
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@ -98,7 +98,7 @@ DEF_HELPER_4(stctg, void, env, i32, i64, i32)
DEF_HELPER_FLAGS_2(tprot, TCG_CALL_NO_RWG, i32, i64, i64) DEF_HELPER_FLAGS_2(tprot, TCG_CALL_NO_RWG, i32, i64, i64)
DEF_HELPER_FLAGS_2(iske, TCG_CALL_NO_RWG_SE, i64, env, i64) DEF_HELPER_FLAGS_2(iske, TCG_CALL_NO_RWG_SE, i64, env, i64)
DEF_HELPER_FLAGS_3(sske, TCG_CALL_NO_RWG, void, env, i64, i64) DEF_HELPER_FLAGS_3(sske, TCG_CALL_NO_RWG, void, env, i64, i64)
DEF_HELPER_FLAGS_3(rrbe, TCG_CALL_NO_RWG, i32, env, i32, i64) DEF_HELPER_FLAGS_2(rrbe, TCG_CALL_NO_RWG, i32, env, i64)
DEF_HELPER_3(csp, i32, env, i32, i32) DEF_HELPER_3(csp, i32, env, i32, i32)
DEF_HELPER_4(mvcs, i32, env, i64, i64, i64) DEF_HELPER_4(mvcs, i32, env, i64, i64, i64)
DEF_HELPER_4(mvcp, i32, env, i64, i64, i64) DEF_HELPER_4(mvcp, i32, env, i64, i64, i64)

2
target-s390x/insn-data.def
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@ -635,6 +635,8 @@
C(0xdb00, MVCS, SS_d, Z, la1, a2, 0, 0, mvcs, 0) C(0xdb00, MVCS, SS_d, Z, la1, a2, 0, 0, mvcs, 0)
/* PURGE TLB */ /* PURGE TLB */
C(0xb20d, PTLB, S, Z, 0, 0, 0, 0, ptlb, 0) C(0xb20d, PTLB, S, Z, 0, 0, 0, 0, ptlb, 0)
/* RESET REFERENCE BIT EXTENDED */
C(0xb22a, RRBE, RRE, Z, 0, r2_o, 0, 0, rrbe, 0)
/* SET ADDRESSING MODE */ /* SET ADDRESSING MODE */
/* We only do 64-bit, so accept this as a no-op. /* We only do 64-bit, so accept this as a no-op.
Let SAM24 and SAM31 signal illegal instruction. */ Let SAM24 and SAM31 signal illegal instruction. */

2
target-s390x/mem_helper.c
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@ -958,7 +958,7 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, uint64_t r2)
} }
/* reset reference bit extended */ /* reset reference bit extended */
uint32_t HELPER(rrbe)(CPUS390XState *env, uint32_t r1, uint64_t r2) uint32_t HELPER(rrbe)(CPUS390XState *env, uint64_t r2)
{ {
uint8_t re; uint8_t re;
uint8_t key; uint8_t key;

22
target-s390x/translate.c
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@ -1033,18 +1033,6 @@ static void disas_b2(CPUS390XState *env, DisasContext *s, int op,
LOG_DISAS("disas_b2: op 0x%x r1 %d r2 %d\n", op, r1, r2); LOG_DISAS("disas_b2: op 0x%x r1 %d r2 %d\n", op, r1, r2);
switch (op) { switch (op) {
case 0x2a: /* RRBE R1,R2 [RRE] */
/* Set Storage Key Extended */
check_privileged(s);
r1 = (insn >> 4) & 0xf;
r2 = insn & 0xf;
tmp32_1 = load_reg32(r1);
tmp = load_reg(r2);
gen_helper_rrbe(cc_op, cpu_env, tmp32_1, tmp);
set_cc_static(s);
tcg_temp_free_i32(tmp32_1);
tcg_temp_free_i64(tmp);
break;
case 0x34: /* STCH ? */ case 0x34: /* STCH ? */
/* Store Subchannel */ /* Store Subchannel */
check_privileged(s); check_privileged(s);
@ -2716,6 +2704,16 @@ static ExitStatus op_rll64(DisasContext *s, DisasOps *o)
return NO_EXIT; return NO_EXIT;
} }
#ifndef CONFIG_USER_ONLY
static ExitStatus op_rrbe(DisasContext *s, DisasOps *o)
{
check_privileged(s);
gen_helper_rrbe(cc_op, cpu_env, o->in2);
set_cc_static(s);
return NO_EXIT;
}
#endif
static ExitStatus op_sar(DisasContext *s, DisasOps *o) static ExitStatus op_sar(DisasContext *s, DisasOps *o)
{ {
int r1 = get_field(s->fields, r1); int r1 = get_field(s->fields, r1);