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exec: return MemoryRegion from address_space_translate 

Only address_space_translate_for_iotlb needs to return the section.
Every caller of address_space_translate now uses only section->mr,
return it directly.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2013-05-29 12:42:00 +02:00
parent acc9d80b26
commit 5c8a00ce18
3 changed files with 84 additions and 84 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

150
exec.c
View File

@ -262,11 +262,11 @@ address_space_translate_internal(AddressSpace *as, hwaddr addr, hwaddr *xlat,
return section; return section;
} }
MemoryRegionSection *address_space_translate(AddressSpace *as, hwaddr addr, MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
hwaddr *xlat, hwaddr *plen, hwaddr *xlat, hwaddr *plen,
bool is_write) bool is_write)
{ {
return address_space_translate_internal(as, addr, xlat, plen, true); return address_space_translate_internal(as, addr, xlat, plen, true)->mr;
} }
MemoryRegionSection * MemoryRegionSection *
@ -1923,58 +1923,58 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
uint8_t *ptr; uint8_t *ptr;
uint64_t val; uint64_t val;
hwaddr addr1; hwaddr addr1;
MemoryRegionSection *section; MemoryRegion *mr;
bool error = false; bool error = false;
while (len > 0) { while (len > 0) {
l = len; l = len;
section = address_space_translate(as, addr, &addr1, &l, is_write); mr = address_space_translate(as, addr, &addr1, &l, is_write);
if (is_write) { if (is_write) {
if (!memory_access_is_direct(section->mr, is_write)) { if (!memory_access_is_direct(mr, is_write)) {
l = memory_access_size(section->mr, l, addr1); l = memory_access_size(mr, l, addr1);
/* XXX: could force cpu_single_env to NULL to avoid /* XXX: could force cpu_single_env to NULL to avoid
potential bugs */ potential bugs */
if (l == 4) { if (l == 4) {
/* 32 bit write access */ /* 32 bit write access */
val = ldl_p(buf); val = ldl_p(buf);
error |= io_mem_write(section->mr, addr1, val, 4); error |= io_mem_write(mr, addr1, val, 4);
} else if (l == 2) { } else if (l == 2) {
/* 16 bit write access */ /* 16 bit write access */
val = lduw_p(buf); val = lduw_p(buf);
error |= io_mem_write(section->mr, addr1, val, 2); error |= io_mem_write(mr, addr1, val, 2);
} else { } else {
/* 8 bit write access */ /* 8 bit write access */
val = ldub_p(buf); val = ldub_p(buf);
error |= io_mem_write(section->mr, addr1, val, 1); error |= io_mem_write(mr, addr1, val, 1);
} }
} else { } else {
addr1 += memory_region_get_ram_addr(section->mr); addr1 += memory_region_get_ram_addr(mr);
/* RAM case */ /* RAM case */
ptr = qemu_get_ram_ptr(addr1); ptr = qemu_get_ram_ptr(addr1);
memcpy(ptr, buf, l); memcpy(ptr, buf, l);
invalidate_and_set_dirty(addr1, l); invalidate_and_set_dirty(addr1, l);
} }
} else { } else {
if (!memory_access_is_direct(section->mr, is_write)) { if (!memory_access_is_direct(mr, is_write)) {
/* I/O case */ /* I/O case */
l = memory_access_size(section->mr, l, addr1); l = memory_access_size(mr, l, addr1);
if (l == 4) { if (l == 4) {
/* 32 bit read access */ /* 32 bit read access */
error |= io_mem_read(section->mr, addr1, &val, 4); error |= io_mem_read(mr, addr1, &val, 4);
stl_p(buf, val); stl_p(buf, val);
} else if (l == 2) { } else if (l == 2) {
/* 16 bit read access */ /* 16 bit read access */
error |= io_mem_read(section->mr, addr1, &val, 2); error |= io_mem_read(mr, addr1, &val, 2);
stw_p(buf, val); stw_p(buf, val);
} else { } else {
/* 8 bit read access */ /* 8 bit read access */
error |= io_mem_read(section->mr, addr1, &val, 1); error |= io_mem_read(mr, addr1, &val, 1);
stb_p(buf, val); stb_p(buf, val);
} }
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_get_ram_ptr(section->mr->ram_addr + addr1); ptr = qemu_get_ram_ptr(mr->ram_addr + addr1);
memcpy(buf, ptr, l); memcpy(buf, ptr, l);
} }
} }
@ -2011,18 +2011,18 @@ void cpu_physical_memory_write_rom(hwaddr addr,
hwaddr l; hwaddr l;
uint8_t *ptr; uint8_t *ptr;
hwaddr addr1; hwaddr addr1;
MemoryRegionSection *section; MemoryRegion *mr;
while (len > 0) { while (len > 0) {
l = len; l = len;
section = address_space_translate(&address_space_memory, mr = address_space_translate(&address_space_memory,
addr, &addr1, &l, true); addr, &addr1, &l, true);
if (!(memory_region_is_ram(section->mr) || if (!(memory_region_is_ram(mr) ||
memory_region_is_romd(section->mr))) { memory_region_is_romd(mr))) {
/* do nothing */ /* do nothing */
} else { } else {
addr1 += memory_region_get_ram_addr(section->mr); addr1 += memory_region_get_ram_addr(mr);
/* ROM/RAM case */ /* ROM/RAM case */
ptr = qemu_get_ram_ptr(addr1); ptr = qemu_get_ram_ptr(addr1);
memcpy(ptr, buf, l); memcpy(ptr, buf, l);
@ -2082,15 +2082,15 @@ static void cpu_notify_map_clients(void)
bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write) bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write)
{ {
MemoryRegionSection *section; MemoryRegion *mr;
hwaddr l, xlat; hwaddr l, xlat;
while (len > 0) { while (len > 0) {
l = len; l = len;
section = address_space_translate(as, addr, &xlat, &l, is_write); mr = address_space_translate(as, addr, &xlat, &l, is_write);
if (!memory_access_is_direct(section->mr, is_write)) { if (!memory_access_is_direct(mr, is_write)) {
l = memory_access_size(section->mr, l, addr); l = memory_access_size(mr, l, addr);
if (!memory_region_access_valid(section->mr, xlat, l, is_write)) { if (!memory_region_access_valid(mr, xlat, l, is_write)) {
return false; return false;
} }
} }
@ -2116,16 +2116,16 @@ void *address_space_map(AddressSpace *as,
hwaddr len = *plen; hwaddr len = *plen;
hwaddr todo = 0; hwaddr todo = 0;
hwaddr l, xlat; hwaddr l, xlat;
MemoryRegionSection *section; MemoryRegion *mr;
ram_addr_t raddr = RAM_ADDR_MAX; ram_addr_t raddr = RAM_ADDR_MAX;
ram_addr_t rlen; ram_addr_t rlen;
void *ret; void *ret;
while (len > 0) { while (len > 0) {
l = len; l = len;
section = address_space_translate(as, addr, &xlat, &l, is_write); mr = address_space_translate(as, addr, &xlat, &l, is_write);
if (!memory_access_is_direct(section->mr, is_write)) { if (!memory_access_is_direct(mr, is_write)) {
if (todo || bounce.buffer) { if (todo || bounce.buffer) {
break; break;
} }
@ -2140,9 +2140,9 @@ void *address_space_map(AddressSpace *as,
return bounce.buffer; return bounce.buffer;
} }
if (!todo) { if (!todo) {
raddr = memory_region_get_ram_addr(section->mr) + xlat; raddr = memory_region_get_ram_addr(mr) + xlat;
} else { } else {
if (memory_region_get_ram_addr(section->mr) + xlat != raddr + todo) { if (memory_region_get_ram_addr(mr) + xlat != raddr + todo) {
break; break;
} }
} }
@ -2209,15 +2209,15 @@ static inline uint32_t ldl_phys_internal(hwaddr addr,
{ {
uint8_t *ptr; uint8_t *ptr;
uint64_t val; uint64_t val;
MemoryRegionSection *section; MemoryRegion *mr;
hwaddr l = 4; hwaddr l = 4;
hwaddr addr1; hwaddr addr1;
section = address_space_translate(&address_space_memory, addr, &addr1, &l, mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
false); false);
if (l < 4 || !memory_access_is_direct(section->mr, false)) { if (l < 4 || !memory_access_is_direct(mr, false)) {
/* I/O case */ /* I/O case */
io_mem_read(section->mr, addr1, &val, 4); io_mem_read(mr, addr1, &val, 4);
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) { if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap32(val); val = bswap32(val);
@ -2229,7 +2229,7 @@ static inline uint32_t ldl_phys_internal(hwaddr addr,
#endif #endif
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(section->mr) ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
& TARGET_PAGE_MASK) & TARGET_PAGE_MASK)
+ addr1); + addr1);
switch (endian) { switch (endian) {
@ -2268,15 +2268,15 @@ static inline uint64_t ldq_phys_internal(hwaddr addr,
{ {
uint8_t *ptr; uint8_t *ptr;
uint64_t val; uint64_t val;
MemoryRegionSection *section; MemoryRegion *mr;
hwaddr l = 8; hwaddr l = 8;
hwaddr addr1; hwaddr addr1;
section = address_space_translate(&address_space_memory, addr, &addr1, &l, mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
false); false);
if (l < 8 || !memory_access_is_direct(section->mr, false)) { if (l < 8 || !memory_access_is_direct(mr, false)) {
/* I/O case */ /* I/O case */
io_mem_read(section->mr, addr1, &val, 8); io_mem_read(mr, addr1, &val, 8);
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) { if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap64(val); val = bswap64(val);
@ -2288,7 +2288,7 @@ static inline uint64_t ldq_phys_internal(hwaddr addr,
#endif #endif
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(section->mr) ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
& TARGET_PAGE_MASK) & TARGET_PAGE_MASK)
+ addr1); + addr1);
switch (endian) { switch (endian) {
@ -2335,15 +2335,15 @@ static inline uint32_t lduw_phys_internal(hwaddr addr,
{ {
uint8_t *ptr; uint8_t *ptr;
uint64_t val; uint64_t val;
MemoryRegionSection *section; MemoryRegion *mr;
hwaddr l = 2; hwaddr l = 2;
hwaddr addr1; hwaddr addr1;
section = address_space_translate(&address_space_memory, addr, &addr1, &l, mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
false); false);
if (l < 2 || !memory_access_is_direct(section->mr, false)) { if (l < 2 || !memory_access_is_direct(mr, false)) {
/* I/O case */ /* I/O case */
io_mem_read(section->mr, addr1, &val, 2); io_mem_read(mr, addr1, &val, 2);
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) { if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap16(val); val = bswap16(val);
@ -2355,7 +2355,7 @@ static inline uint32_t lduw_phys_internal(hwaddr addr,
#endif #endif
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(section->mr) ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr)
& TARGET_PAGE_MASK) & TARGET_PAGE_MASK)
+ addr1); + addr1);
switch (endian) { switch (endian) {
@ -2394,16 +2394,16 @@ uint32_t lduw_be_phys(hwaddr addr)
void stl_phys_notdirty(hwaddr addr, uint32_t val) void stl_phys_notdirty(hwaddr addr, uint32_t val)
{ {
uint8_t *ptr; uint8_t *ptr;
MemoryRegionSection *section; MemoryRegion *mr;
hwaddr l = 4; hwaddr l = 4;
hwaddr addr1; hwaddr addr1;
section = address_space_translate(&address_space_memory, addr, &addr1, &l, mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
true); true);
if (l < 4 || !memory_access_is_direct(section->mr, true)) { if (l < 4 || !memory_access_is_direct(mr, true)) {
io_mem_write(section->mr, addr1, val, 4); io_mem_write(mr, addr1, val, 4);
} else { } else {
addr1 += memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK; addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
ptr = qemu_get_ram_ptr(addr1); ptr = qemu_get_ram_ptr(addr1);
stl_p(ptr, val); stl_p(ptr, val);
@ -2424,13 +2424,13 @@ static inline void stl_phys_internal(hwaddr addr, uint32_t val,
enum device_endian endian) enum device_endian endian)
{ {
uint8_t *ptr; uint8_t *ptr;
MemoryRegionSection *section; MemoryRegion *mr;
hwaddr l = 4; hwaddr l = 4;
hwaddr addr1; hwaddr addr1;
section = address_space_translate(&address_space_memory, addr, &addr1, &l, mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
true); true);
if (l < 4 || !memory_access_is_direct(section->mr, true)) { if (l < 4 || !memory_access_is_direct(mr, true)) {
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) { if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap32(val); val = bswap32(val);
@ -2440,10 +2440,10 @@ static inline void stl_phys_internal(hwaddr addr, uint32_t val,
val = bswap32(val); val = bswap32(val);
} }
#endif #endif
io_mem_write(section->mr, addr1, val, 4); io_mem_write(mr, addr1, val, 4);
} else { } else {
/* RAM case */ /* RAM case */
addr1 += memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK; addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
ptr = qemu_get_ram_ptr(addr1); ptr = qemu_get_ram_ptr(addr1);
switch (endian) { switch (endian) {
case DEVICE_LITTLE_ENDIAN: case DEVICE_LITTLE_ENDIAN:
@ -2487,13 +2487,13 @@ static inline void stw_phys_internal(hwaddr addr, uint32_t val,
enum device_endian endian) enum device_endian endian)
{ {
uint8_t *ptr; uint8_t *ptr;
MemoryRegionSection *section; MemoryRegion *mr;
hwaddr l = 2; hwaddr l = 2;
hwaddr addr1; hwaddr addr1;
section = address_space_translate(&address_space_memory, addr, &addr1, &l, mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
true); true);
if (l < 2 || !memory_access_is_direct(section->mr, true)) { if (l < 2 || !memory_access_is_direct(mr, true)) {
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) { if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap16(val); val = bswap16(val);
@ -2503,10 +2503,10 @@ static inline void stw_phys_internal(hwaddr addr, uint32_t val,
val = bswap16(val); val = bswap16(val);
} }
#endif #endif
io_mem_write(section->mr, addr1, val, 2); io_mem_write(mr, addr1, val, 2);
} else { } else {
/* RAM case */ /* RAM case */
addr1 += memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK; addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
ptr = qemu_get_ram_ptr(addr1); ptr = qemu_get_ram_ptr(addr1);
switch (endian) { switch (endian) {
case DEVICE_LITTLE_ENDIAN: case DEVICE_LITTLE_ENDIAN:
@ -2608,13 +2608,13 @@ bool virtio_is_big_endian(void)
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
bool cpu_physical_memory_is_io(hwaddr phys_addr) bool cpu_physical_memory_is_io(hwaddr phys_addr)
{ {
MemoryRegionSection *section; MemoryRegion*mr;
hwaddr l = 1; hwaddr l = 1;
section = address_space_translate(&address_space_memory, mr = address_space_translate(&address_space_memory,
phys_addr, &phys_addr, &l, false); phys_addr, &phys_addr, &l, false);
return !(memory_region_is_ram(section->mr) || return !(memory_region_is_ram(mr) ||
memory_region_is_romd(section->mr)); memory_region_is_romd(mr));
} }
#endif #endif

8
include/exec/memory.h
View File

@ -859,7 +859,7 @@ bool address_space_write(AddressSpace *as, hwaddr addr,
bool address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len); bool address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len);
/* address_space_translate: translate an address range into an address space /* address_space_translate: translate an address range into an address space
* into a MemoryRegionSection and an address range into that section * into a MemoryRegion and an address range into that section
* *
* @as: #AddressSpace to be accessed * @as: #AddressSpace to be accessed
* @addr: address within that address space * @addr: address within that address space
@ -868,9 +868,9 @@ bool address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len);
* @len: pointer to length * @len: pointer to length
* @is_write: indicates the transfer direction * @is_write: indicates the transfer direction
*/ */
MemoryRegionSection *address_space_translate(AddressSpace *as, hwaddr addr, MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
hwaddr *xlat, hwaddr *len, hwaddr *xlat, hwaddr *len,
bool is_write); bool is_write);
/* address_space_access_valid: check for validity of accessing an address /* address_space_access_valid: check for validity of accessing an address
* space range * space range

10
translate-all.c
View File

@ -1355,15 +1355,15 @@ static TranslationBlock *tb_find_pc(uintptr_t tc_ptr)
void tb_invalidate_phys_addr(hwaddr addr) void tb_invalidate_phys_addr(hwaddr addr)
{ {
ram_addr_t ram_addr; ram_addr_t ram_addr;
MemoryRegionSection *section; MemoryRegion *mr;
hwaddr l = 1; hwaddr l = 1;
section = address_space_translate(&address_space_memory, addr, &addr, &l, false); mr = address_space_translate(&address_space_memory, addr, &addr, &l, false);
if (!(memory_region_is_ram(section->mr) if (!(memory_region_is_ram(mr)
|| memory_region_is_romd(section->mr))) { || memory_region_is_romd(mr))) {
return; return;
} }
ram_addr = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK) ram_addr = (memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK)
+ addr; + addr;
tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0); tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0);
} }