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openpic: remove irq_out 

The current openpic emulation contains half-ready code for bypass mode.
Remove it, so that when someone wants to finish it they can start from a
clean state.

Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Alexander Graf 2012-12-08 02:18:58 +01:00
parent 6d544ee8ac
commit 5bac070111
4 changed files with 6 additions and 10 deletions
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8
hw/openpic.c
View File

@ -237,8 +237,6 @@ typedef struct OpenPICState {
uint32_t ticc; /* Global timer current count register */ uint32_t ticc; /* Global timer current count register */
uint32_t tibc; /* Global timer base count register */ uint32_t tibc; /* Global timer base count register */
} timers[MAX_TMR]; } timers[MAX_TMR];
/* IRQ out is used when in bypass mode (not implemented) */
qemu_irq irq_out;
int max_irq; int max_irq;
int irq_ipi0; int irq_ipi0;
int irq_tim0; int irq_tim0;
@ -1051,7 +1049,7 @@ static void openpic_irq_raise(OpenPICState *opp, int n_CPU, IRQ_src_t *src)
} }
qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus, qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
qemu_irq **irqs, qemu_irq irq_out) qemu_irq **irqs)
{ {
OpenPICState *opp; OpenPICState *opp;
int i; int i;
@ -1100,7 +1098,6 @@ qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
for (i = 0; i < nb_cpus; i++) for (i = 0; i < nb_cpus; i++)
opp->dst[i].irqs = irqs[i]; opp->dst[i].irqs = irqs[i];
opp->irq_out = irq_out;
register_savevm(&opp->pci_dev.qdev, "openpic", 0, 2, register_savevm(&opp->pci_dev.qdev, "openpic", 0, 2,
openpic_save, openpic_load, opp); openpic_save, openpic_load, opp);
@ -1113,7 +1110,7 @@ qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
} }
qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base, qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base,
int nb_cpus, qemu_irq **irqs, qemu_irq irq_out) int nb_cpus, qemu_irq **irqs)
{ {
OpenPICState *mpp; OpenPICState *mpp;
int i; int i;
@ -1159,7 +1156,6 @@ qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base,
for (i = 0; i < nb_cpus; i++) for (i = 0; i < nb_cpus; i++)
mpp->dst[i].irqs = irqs[i]; mpp->dst[i].irqs = irqs[i];
mpp->irq_out = irq_out;
/* Enable critical interrupt support */ /* Enable critical interrupt support */
mpp->flags |= OPENPIC_FLAG_IDE_CRIT; mpp->flags |= OPENPIC_FLAG_IDE_CRIT;

4
hw/openpic.h
View File

@ -15,7 +15,7 @@ enum {
#define OPENPIC_FLAG_IDE_CRIT (1 << 0) #define OPENPIC_FLAG_IDE_CRIT (1 << 0)
qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus, qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
qemu_irq **irqs, qemu_irq irq_out); qemu_irq **irqs);
qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base, qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base,
int nb_cpus, qemu_irq **irqs, qemu_irq irq_out); int nb_cpus, qemu_irq **irqs);
#endif /* __OPENPIC_H__ */ #endif /* __OPENPIC_H__ */

2
hw/ppc/e500.c
View File

@ -493,7 +493,7 @@ void ppce500_init(PPCE500Params *params)
/* MPIC */ /* MPIC */
mpic = mpic_init(ccsr_addr_space, MPC8544_MPIC_REGS_OFFSET, mpic = mpic_init(ccsr_addr_space, MPC8544_MPIC_REGS_OFFSET,
smp_cpus, irqs, NULL); smp_cpus, irqs);
if (!mpic) { if (!mpic) {
cpu_abort(env, "MPIC failed to initialize\n"); cpu_abort(env, "MPIC failed to initialize\n");

2
hw/ppc_newworld.c
View File

@ -320,7 +320,7 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
exit(1); exit(1);
} }
} }
pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL); pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs);
if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
/* 970 gets a U3 bus */ /* 970 gets a U3 bus */
pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io()); pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());