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target-arm: Change gen_intermediate_code_internal() argument to ARMCPU 

Also use bool type while at it.

Prepares for moving singlestep_enabled field to CPUState.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2013-06-21 21:57:04 +02:00
parent 86a35f7c46
commit 5639c3f224
1 changed files with 5 additions and 4 deletions
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9
target-arm/translate.c
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@ -9796,10 +9796,11 @@ undef:
/* generate intermediate code in gen_opc_buf and gen_opparam_buf for /* generate intermediate code in gen_opc_buf and gen_opparam_buf for
basic block 'tb'. If search_pc is TRUE, also generate PC basic block 'tb'. If search_pc is TRUE, also generate PC
information for each intermediate instruction. */ information for each intermediate instruction. */
static inline void gen_intermediate_code_internal(CPUARMState *env, static inline void gen_intermediate_code_internal(ARMCPU *cpu,
TranslationBlock *tb, TranslationBlock *tb,
int search_pc) bool search_pc)
{ {
CPUARMState *env = &cpu->env;
DisasContext dc1, *dc = &dc1; DisasContext dc1, *dc = &dc1;
CPUBreakpoint *bp; CPUBreakpoint *bp;
uint16_t *gen_opc_end; uint16_t *gen_opc_end;
@ -10072,12 +10073,12 @@ done_generating:
void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb) void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
{ {
gen_intermediate_code_internal(env, tb, 0); gen_intermediate_code_internal(arm_env_get_cpu(env), tb, false);
} }
void gen_intermediate_code_pc(CPUARMState *env, TranslationBlock *tb) void gen_intermediate_code_pc(CPUARMState *env, TranslationBlock *tb)
{ {
gen_intermediate_code_internal(env, tb, 1); gen_intermediate_code_internal(arm_env_get_cpu(env), tb, true);
} }
static const char *cpu_mode_names[16] = { static const char *cpu_mode_names[16] = {