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Implement exception prefix feature for PowerPC 601. 

Fix PowerPC 601 hardware reset vector.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3352 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-10-08 02:35:41 +00:00
parent 7a3a6927b6
commit 4e80effcf9
2 changed files with 8 additions and 7 deletions
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13
target-ppc/helper.c
View File

@ -1996,16 +1996,17 @@ int do_store_msr (CPUPPCState *env, target_ulong value)
tlb_flush(env, 1);
env->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
#if 0
if (loglevel != 0) {
fprintf(logfile, "%s: T0 %08lx\n", __func__, value);
}
#endif
#if !defined (CONFIG_USER_ONLY)
if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
((value >> MSR_TGPR) & 1) != msr_tgpr)) {
/* Swap temporary saved registers with GPRs */
swap_gpr_tgpr(env);
}
if (unlikely((value >> MSR_EP) & 1) != msr_ep) {
/* Change the exception prefix on PowerPC 601 */
env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000;
}
#endif
#if defined (TARGET_PPC64)
msr_sf = (value >> MSR_SF) & 1;
msr_isf = (value >> MSR_ISF) & 1;
@ -2899,7 +2900,7 @@ void cpu_ppc_reset (void *opaque)
#endif
msr_ap = 0; /* TO BE CHECKED */
msr_sa = 0; /* TO BE CHECKED */
msr_ip = 0; /* TO BE CHECKED */
msr_ep = 1;
#if defined (DO_SINGLE_STEP) && 0
/* Single step trace mode */
msr_se = 1;

2
target-ppc/translate_init.c
View File

@ -2322,7 +2322,7 @@ static void init_excp_601 (CPUPPCState *env)
env->excp_vectors[POWERPC_EXCP_RUNM] = 0x00002000;
env->excp_prefix = 0xFFF00000;
/* Hardware reset vector */
env->hreset_vector = 0xFFFFFFFCUL;
env->hreset_vector = 0x00000100UL;
#endif
}