mirror of https://github.com/xqemu/xqemu.git
hw/net/eepro100.c: Don't use cpu_to_*w() and *_to_cpup()
Don't use cpu_to_*w() and *_to_cpup() to do byte-swapped loads and stores; instead use ld*_p() and st*_p() which correctly handle misaligned accesses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Jason Wang <jasowang@redhat.com> Acked-by: Dmitry Fleytman <dmitry@daynix.com <mailto:dmitry@daynix.com>> Message-id: 1466097446-981-2-git-send-email-peter.maydell@linaro.org
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@ -352,14 +352,14 @@ static unsigned e100_compute_mcast_idx(const uint8_t *ep)
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static uint16_t e100_read_reg2(EEPRO100State *s, E100RegisterOffset addr)
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static uint16_t e100_read_reg2(EEPRO100State *s, E100RegisterOffset addr)
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{
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{
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assert(!((uintptr_t)&s->mem[addr] & 1));
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assert(!((uintptr_t)&s->mem[addr] & 1));
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return le16_to_cpup((uint16_t *)&s->mem[addr]);
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return lduw_le_p(&s->mem[addr]);
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}
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}
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/* Read a 32 bit control/status (CSR) register. */
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/* Read a 32 bit control/status (CSR) register. */
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static uint32_t e100_read_reg4(EEPRO100State *s, E100RegisterOffset addr)
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static uint32_t e100_read_reg4(EEPRO100State *s, E100RegisterOffset addr)
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{
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{
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assert(!((uintptr_t)&s->mem[addr] & 3));
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assert(!((uintptr_t)&s->mem[addr] & 3));
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return le32_to_cpup((uint32_t *)&s->mem[addr]);
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return ldl_le_p(&s->mem[addr]);
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}
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}
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/* Write a 16 bit control/status (CSR) register. */
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/* Write a 16 bit control/status (CSR) register. */
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@ -367,7 +367,7 @@ static void e100_write_reg2(EEPRO100State *s, E100RegisterOffset addr,
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uint16_t val)
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uint16_t val)
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{
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{
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assert(!((uintptr_t)&s->mem[addr] & 1));
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assert(!((uintptr_t)&s->mem[addr] & 1));
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cpu_to_le16w((uint16_t *)&s->mem[addr], val);
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stw_le_p(&s->mem[addr], val);
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}
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}
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/* Read a 32 bit control/status (CSR) register. */
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/* Read a 32 bit control/status (CSR) register. */
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@ -375,7 +375,7 @@ static void e100_write_reg4(EEPRO100State *s, E100RegisterOffset addr,
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uint32_t val)
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uint32_t val)
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{
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{
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assert(!((uintptr_t)&s->mem[addr] & 3));
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assert(!((uintptr_t)&s->mem[addr] & 3));
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cpu_to_le32w((uint32_t *)&s->mem[addr], val);
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stl_le_p(&s->mem[addr], val);
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}
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}
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#if defined(DEBUG_EEPRO100)
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#if defined(DEBUG_EEPRO100)
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