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hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values 

The GSIV numbers of the SPI based interrupts is not correct as
ARM_SPI_BASE was not added to the irqmap[VIRT_SMMU] value. So
this may collide with VIRTIO_MMIO irq window.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20190312091031.5185-1-eric.auger@redhat.com
Reviewed-by: Shannon Zhao <shannon.zhaosl@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Eric Auger 2019-03-15 11:12:28 +00:00 committed by Peter Maydell
parent 67d80321f2
commit 41c4fb94aa
1 changed files with 1 additions and 1 deletions
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2
hw/arm/virt-acpi-build.c
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@ -405,7 +405,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
its->identifiers[0] = 0; /* MADT translation_id */
if (vms->iommu == VIRT_IOMMU_SMMUV3) {
int irq = vms->irqmap[VIRT_SMMU];
int irq = vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE;
/* SMMUv3 node */
smmu_offset = iort_node_offset + node_size;