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target-arm: xlnx-zynqmp: Add sdhci support. 

Add two SYSBUS_SDHCI devices for xlnx-zynqmp

Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Sai Pavan Boddu 2015-10-08 18:51:03 +05:30 committed by Stefan Hajnoczi
parent 637d23beb6
commit 33108e9f33
2 changed files with 31 additions and 0 deletions
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28
hw/arm/xlnx-zynqmp.c
View File

@ -48,6 +48,14 @@ static const int uart_intr[XLNX_ZYNQMP_NUM_UARTS] = {
21, 22, 21, 22,
}; };
static const uint64_t sdhci_addr[XLNX_ZYNQMP_NUM_SDHCI] = {
0xFF160000, 0xFF170000,
};
static const int sdhci_intr[XLNX_ZYNQMP_NUM_SDHCI] = {
48, 49,
};
typedef struct XlnxZynqMPGICRegion { typedef struct XlnxZynqMPGICRegion {
int region_index; int region_index;
uint32_t address; uint32_t address;
@ -97,6 +105,13 @@ static void xlnx_zynqmp_init(Object *obj)
object_initialize(&s->sata, sizeof(s->sata), TYPE_SYSBUS_AHCI); object_initialize(&s->sata, sizeof(s->sata), TYPE_SYSBUS_AHCI);
qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default()); qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
object_initialize(&s->sdhci[i], sizeof(s->sdhci[i]),
TYPE_SYSBUS_SDHCI);
qdev_set_parent_bus(DEVICE(&s->sdhci[i]),
sysbus_get_default());
}
} }
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@ -258,6 +273,19 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR); sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, gic_spi[SATA_INTR]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, gic_spi[SATA_INTR]);
for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
object_property_set_bool(OBJECT(&s->sdhci[i]), true,
"realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
sdhci_addr[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
gic_spi[sdhci_intr[i]]);
}
} }
static Property xlnx_zynqmp_props[] = { static Property xlnx_zynqmp_props[] = {

3
include/hw/arm/xlnx-zynqmp.h
View File

@ -24,6 +24,7 @@
#include "hw/char/cadence_uart.h" #include "hw/char/cadence_uart.h"
#include "hw/ide/pci.h" #include "hw/ide/pci.h"
#include "hw/ide/ahci.h" #include "hw/ide/ahci.h"
#include "hw/sd/sdhci.h"
#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
@ -33,6 +34,7 @@
#define XLNX_ZYNQMP_NUM_RPU_CPUS 2 #define XLNX_ZYNQMP_NUM_RPU_CPUS 2
#define XLNX_ZYNQMP_NUM_GEMS 4 #define XLNX_ZYNQMP_NUM_GEMS 4
#define XLNX_ZYNQMP_NUM_UARTS 2 #define XLNX_ZYNQMP_NUM_UARTS 2
#define XLNX_ZYNQMP_NUM_SDHCI 2
#define XLNX_ZYNQMP_NUM_OCM_BANKS 4 #define XLNX_ZYNQMP_NUM_OCM_BANKS 4
#define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000 #define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000
@ -63,6 +65,7 @@ typedef struct XlnxZynqMPState {
CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS]; CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS];
CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS]; CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
SysbusAHCIState sata; SysbusAHCIState sata;
SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI];
char *boot_cpu; char *boot_cpu;
ARMCPU *boot_cpu_ptr; ARMCPU *boot_cpu_ptr;