mirror of https://github.com/xqemu/xqemu.git
pc87312: Replace register_ioport_*() with MemoryRegion
Prepare an instance_init function for the MemoryRegion init. Signed-off-by: Andreas Färber <andreas.faerber@web.de> Tested-by: Hervé Poussineau <hpoussin@reactos.org>
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parent
cf7c3f0cb5
commit
328c24a97b
26
hw/pc87312.c
26
hw/pc87312.c
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@ -194,7 +194,8 @@ static void pc87312_hard_reset(PC87312State *s)
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pc87312_soft_reset(s);
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pc87312_soft_reset(s);
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}
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}
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static void pc87312_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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static void pc87312_io_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned int size)
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{
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{
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PC87312State *s = opaque;
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PC87312State *s = opaque;
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@ -213,7 +214,7 @@ static void pc87312_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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}
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}
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}
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}
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static uint32_t pc87312_ioport_read(void *opaque, uint32_t addr)
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static uint64_t pc87312_io_read(void *opaque, hwaddr addr, unsigned int size)
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{
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{
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PC87312State *s = opaque;
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PC87312State *s = opaque;
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uint32_t val;
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uint32_t val;
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@ -241,6 +242,16 @@ static uint32_t pc87312_ioport_read(void *opaque, uint32_t addr)
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return val;
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return val;
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}
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}
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static const MemoryRegionOps pc87312_io_ops = {
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.read = pc87312_io_read,
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.write = pc87312_io_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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};
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static int pc87312_post_load(void *opaque, int version_id)
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static int pc87312_post_load(void *opaque, int version_id)
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{
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{
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PC87312State *s = opaque;
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PC87312State *s = opaque;
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@ -270,6 +281,7 @@ static int pc87312_init(ISADevice *dev)
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s = PC87312(dev);
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s = PC87312(dev);
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bus = isa_bus_from_device(dev);
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bus = isa_bus_from_device(dev);
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pc87312_hard_reset(s);
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pc87312_hard_reset(s);
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isa_register_ioport(dev, &s->io, s->iobase);
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if (is_parallel_enabled(s)) {
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if (is_parallel_enabled(s)) {
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chr = parallel_hds[0];
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chr = parallel_hds[0];
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@ -337,11 +349,16 @@ static int pc87312_init(ISADevice *dev)
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trace_pc87312_info_ide(get_ide_iobase(s));
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trace_pc87312_info_ide(get_ide_iobase(s));
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}
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}
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register_ioport_write(s->iobase, 2, 1, pc87312_ioport_write, s);
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register_ioport_read(s->iobase, 2, 1, pc87312_ioport_read, s);
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return 0;
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return 0;
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}
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}
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static void pc87312_initfn(Object *obj)
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{
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PC87312State *s = PC87312(obj);
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memory_region_init_io(&s->io, &pc87312_io_ops, s, "pc87312", 2);
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}
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static const VMStateDescription vmstate_pc87312 = {
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static const VMStateDescription vmstate_pc87312 = {
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.name = "pc87312",
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.name = "pc87312",
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.version_id = 1,
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.version_id = 1,
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@ -376,6 +393,7 @@ static const TypeInfo pc87312_type_info = {
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.name = TYPE_PC87312,
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.name = TYPE_PC87312,
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.parent = TYPE_ISA_DEVICE,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(PC87312State),
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.instance_size = sizeof(PC87312State),
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.instance_init = pc87312_initfn,
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.class_init = pc87312_class_init,
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.class_init = pc87312_class_init,
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};
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};
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@ -56,6 +56,8 @@ typedef struct PC87312State {
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uint32_t base;
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uint32_t base;
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} ide;
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} ide;
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MemoryRegion io;
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uint8_t read_id_step;
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uint8_t read_id_step;
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uint8_t selected_index;
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uint8_t selected_index;
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