pxa2xx_mmci: convert to memory API

Convert mechanicaly; the access size of the old_mmio fields
seems odd.

Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Benoît Canet 2011-10-30 14:50:18 +01:00 committed by Avi Kivity
parent 90e8e5a32c
commit 2bf90458a0
3 changed files with 20 additions and 18 deletions

View File

@ -85,7 +85,8 @@ void pxa2xx_lcdc_oritentation(void *opaque, int angle);
/* pxa2xx_mmci.c */ /* pxa2xx_mmci.c */
typedef struct PXA2xxMMCIState PXA2xxMMCIState; typedef struct PXA2xxMMCIState PXA2xxMMCIState;
PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base, PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
target_phys_addr_t base,
BlockDriverState *bd, qemu_irq irq, BlockDriverState *bd, qemu_irq irq,
qemu_irq rx_dma, qemu_irq tx_dma); qemu_irq rx_dma, qemu_irq tx_dma);
void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly, void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly,

View File

@ -2072,7 +2072,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
fprintf(stderr, "qemu: missing SecureDigital device\n"); fprintf(stderr, "qemu: missing SecureDigital device\n");
exit(1); exit(1);
} }
s->mmc = pxa2xx_mmci_init(0x41100000, dinfo->bdrv, s->mmc = pxa2xx_mmci_init(address_space, 0x41100000, dinfo->bdrv,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC), qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI), qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI)); qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
@ -2201,7 +2201,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
fprintf(stderr, "qemu: missing SecureDigital device\n"); fprintf(stderr, "qemu: missing SecureDigital device\n");
exit(1); exit(1);
} }
s->mmc = pxa2xx_mmci_init(0x41100000, dinfo->bdrv, s->mmc = pxa2xx_mmci_init(address_space, 0x41100000, dinfo->bdrv,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC), qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI), qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI)); qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));

View File

@ -13,6 +13,7 @@
#include "qdev.h" #include "qdev.h"
struct PXA2xxMMCIState { struct PXA2xxMMCIState {
MemoryRegion iomem;
qemu_irq irq; qemu_irq irq;
qemu_irq rx_dma; qemu_irq rx_dma;
qemu_irq tx_dma; qemu_irq tx_dma;
@ -403,12 +404,6 @@ static uint32_t pxa2xx_mmci_readw(void *opaque, target_phys_addr_t offset)
return pxa2xx_mmci_read(opaque, offset); return pxa2xx_mmci_read(opaque, offset);
} }
static CPUReadMemoryFunc * const pxa2xx_mmci_readfn[] = {
pxa2xx_mmci_readb,
pxa2xx_mmci_readh,
pxa2xx_mmci_readw
};
static void pxa2xx_mmci_writeb(void *opaque, static void pxa2xx_mmci_writeb(void *opaque,
target_phys_addr_t offset, uint32_t value) target_phys_addr_t offset, uint32_t value)
{ {
@ -433,10 +428,16 @@ static void pxa2xx_mmci_writew(void *opaque,
pxa2xx_mmci_write(opaque, offset, value); pxa2xx_mmci_write(opaque, offset, value);
} }
static CPUWriteMemoryFunc * const pxa2xx_mmci_writefn[] = { static const MemoryRegionOps pxa2xx_mmci_ops = {
pxa2xx_mmci_writeb, .old_mmio = {
pxa2xx_mmci_writeh, .read = { pxa2xx_mmci_readb,
pxa2xx_mmci_writew pxa2xx_mmci_readh,
pxa2xx_mmci_readw, },
.write = { pxa2xx_mmci_writeb,
pxa2xx_mmci_writeh,
pxa2xx_mmci_writew, },
},
.endianness = DEVICE_NATIVE_ENDIAN,
}; };
static void pxa2xx_mmci_save(QEMUFile *f, void *opaque) static void pxa2xx_mmci_save(QEMUFile *f, void *opaque)
@ -517,11 +518,11 @@ static int pxa2xx_mmci_load(QEMUFile *f, void *opaque, int version_id)
return 0; return 0;
} }
PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base, PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
target_phys_addr_t base,
BlockDriverState *bd, qemu_irq irq, BlockDriverState *bd, qemu_irq irq,
qemu_irq rx_dma, qemu_irq tx_dma) qemu_irq rx_dma, qemu_irq tx_dma)
{ {
int iomemtype;
PXA2xxMMCIState *s; PXA2xxMMCIState *s;
s = (PXA2xxMMCIState *) g_malloc0(sizeof(PXA2xxMMCIState)); s = (PXA2xxMMCIState *) g_malloc0(sizeof(PXA2xxMMCIState));
@ -529,9 +530,9 @@ PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base,
s->rx_dma = rx_dma; s->rx_dma = rx_dma;
s->tx_dma = tx_dma; s->tx_dma = tx_dma;
iomemtype = cpu_register_io_memory(pxa2xx_mmci_readfn, memory_region_init_io(&s->iomem, &pxa2xx_mmci_ops, s,
pxa2xx_mmci_writefn, s, DEVICE_NATIVE_ENDIAN); "pxa2xx-mmci", 0x00100000);
cpu_register_physical_memory(base, 0x00100000, iomemtype); memory_region_add_subregion(sysmem, base, &s->iomem);
/* Instantiate the actual storage */ /* Instantiate the actual storage */
s->card = sd_init(bd, 0); s->card = sd_init(bd, 0);