mirror of https://github.com/xqemu/xqemu.git
pxa2xx_mmci: convert to memory API
Convert mechanicaly; the access size of the old_mmio fields seems odd. Signed-off-by: Benoit Canet <benoit.canet@gmail.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
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90e8e5a32c
commit
2bf90458a0
3
hw/pxa.h
3
hw/pxa.h
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@ -85,7 +85,8 @@ void pxa2xx_lcdc_oritentation(void *opaque, int angle);
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/* pxa2xx_mmci.c */
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/* pxa2xx_mmci.c */
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typedef struct PXA2xxMMCIState PXA2xxMMCIState;
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typedef struct PXA2xxMMCIState PXA2xxMMCIState;
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PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base,
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PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
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target_phys_addr_t base,
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BlockDriverState *bd, qemu_irq irq,
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BlockDriverState *bd, qemu_irq irq,
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qemu_irq rx_dma, qemu_irq tx_dma);
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qemu_irq rx_dma, qemu_irq tx_dma);
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void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly,
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void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly,
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@ -2072,7 +2072,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
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fprintf(stderr, "qemu: missing SecureDigital device\n");
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fprintf(stderr, "qemu: missing SecureDigital device\n");
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exit(1);
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exit(1);
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}
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}
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s->mmc = pxa2xx_mmci_init(0x41100000, dinfo->bdrv,
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s->mmc = pxa2xx_mmci_init(address_space, 0x41100000, dinfo->bdrv,
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qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
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qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
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qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
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qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
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qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
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qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
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@ -2201,7 +2201,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
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fprintf(stderr, "qemu: missing SecureDigital device\n");
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fprintf(stderr, "qemu: missing SecureDigital device\n");
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exit(1);
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exit(1);
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}
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}
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s->mmc = pxa2xx_mmci_init(0x41100000, dinfo->bdrv,
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s->mmc = pxa2xx_mmci_init(address_space, 0x41100000, dinfo->bdrv,
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qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
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qdev_get_gpio_in(s->pic, PXA2XX_PIC_MMC),
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qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
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qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
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qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
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qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
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@ -13,6 +13,7 @@
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#include "qdev.h"
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#include "qdev.h"
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struct PXA2xxMMCIState {
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struct PXA2xxMMCIState {
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MemoryRegion iomem;
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qemu_irq irq;
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qemu_irq irq;
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qemu_irq rx_dma;
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qemu_irq rx_dma;
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qemu_irq tx_dma;
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qemu_irq tx_dma;
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@ -403,12 +404,6 @@ static uint32_t pxa2xx_mmci_readw(void *opaque, target_phys_addr_t offset)
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return pxa2xx_mmci_read(opaque, offset);
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return pxa2xx_mmci_read(opaque, offset);
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}
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}
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static CPUReadMemoryFunc * const pxa2xx_mmci_readfn[] = {
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pxa2xx_mmci_readb,
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pxa2xx_mmci_readh,
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pxa2xx_mmci_readw
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};
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static void pxa2xx_mmci_writeb(void *opaque,
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static void pxa2xx_mmci_writeb(void *opaque,
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target_phys_addr_t offset, uint32_t value)
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target_phys_addr_t offset, uint32_t value)
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{
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{
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@ -433,10 +428,16 @@ static void pxa2xx_mmci_writew(void *opaque,
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pxa2xx_mmci_write(opaque, offset, value);
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pxa2xx_mmci_write(opaque, offset, value);
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}
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}
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static CPUWriteMemoryFunc * const pxa2xx_mmci_writefn[] = {
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static const MemoryRegionOps pxa2xx_mmci_ops = {
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pxa2xx_mmci_writeb,
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.old_mmio = {
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pxa2xx_mmci_writeh,
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.read = { pxa2xx_mmci_readb,
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pxa2xx_mmci_writew
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pxa2xx_mmci_readh,
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pxa2xx_mmci_readw, },
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.write = { pxa2xx_mmci_writeb,
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pxa2xx_mmci_writeh,
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pxa2xx_mmci_writew, },
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},
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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};
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static void pxa2xx_mmci_save(QEMUFile *f, void *opaque)
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static void pxa2xx_mmci_save(QEMUFile *f, void *opaque)
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@ -517,11 +518,11 @@ static int pxa2xx_mmci_load(QEMUFile *f, void *opaque, int version_id)
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return 0;
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return 0;
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}
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}
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PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base,
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PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
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target_phys_addr_t base,
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BlockDriverState *bd, qemu_irq irq,
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BlockDriverState *bd, qemu_irq irq,
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qemu_irq rx_dma, qemu_irq tx_dma)
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qemu_irq rx_dma, qemu_irq tx_dma)
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{
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{
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int iomemtype;
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PXA2xxMMCIState *s;
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PXA2xxMMCIState *s;
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s = (PXA2xxMMCIState *) g_malloc0(sizeof(PXA2xxMMCIState));
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s = (PXA2xxMMCIState *) g_malloc0(sizeof(PXA2xxMMCIState));
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@ -529,9 +530,9 @@ PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base,
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s->rx_dma = rx_dma;
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s->rx_dma = rx_dma;
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s->tx_dma = tx_dma;
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s->tx_dma = tx_dma;
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iomemtype = cpu_register_io_memory(pxa2xx_mmci_readfn,
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memory_region_init_io(&s->iomem, &pxa2xx_mmci_ops, s,
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pxa2xx_mmci_writefn, s, DEVICE_NATIVE_ENDIAN);
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"pxa2xx-mmci", 0x00100000);
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cpu_register_physical_memory(base, 0x00100000, iomemtype);
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memory_region_add_subregion(sysmem, base, &s->iomem);
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/* Instantiate the actual storage */
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/* Instantiate the actual storage */
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s->card = sd_init(bd, 0);
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s->card = sd_init(bd, 0);
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