mirror of https://github.com/xqemu/xqemu.git
low level support for memory mapped flash devices (initial patch by Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2020 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -828,6 +828,10 @@ extern uint8_t *phys_ram_dirty;
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#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */
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#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */
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#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT)
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#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT)
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#define IO_MEM_NOTDIRTY (4 << IO_MEM_SHIFT) /* used internally, never use directly */
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#define IO_MEM_NOTDIRTY (4 << IO_MEM_SHIFT) /* used internally, never use directly */
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/* acts like a ROM when read and like a device when written. As an
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exception, the write memory callback gets the ram offset instead of
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the physical address */
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#define IO_MEM_ROMD (1)
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typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
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typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
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typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
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typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
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@ -570,7 +570,7 @@ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
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ldub_code(addr);
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ldub_code(addr);
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}
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}
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pd = env->tlb_table[is_user][index].addr_code & ~TARGET_PAGE_MASK;
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pd = env->tlb_table[is_user][index].addr_code & ~TARGET_PAGE_MASK;
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if (pd > IO_MEM_ROM) {
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if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
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cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr);
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cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr);
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}
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}
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return addr + env->tlb_table[is_user][index].addend - (unsigned long)phys_ram_base;
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return addr + env->tlb_table[is_user][index].addend - (unsigned long)phys_ram_base;
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17
exec.c
17
exec.c
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@ -1488,7 +1488,7 @@ int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
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if (is_softmmu)
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if (is_softmmu)
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#endif
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#endif
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{
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{
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if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM) {
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if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
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/* IO memory case */
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/* IO memory case */
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address = vaddr | pd;
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address = vaddr | pd;
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addend = paddr;
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addend = paddr;
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@ -1785,7 +1785,8 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr,
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for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) {
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for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) {
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p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1);
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p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1);
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p->phys_offset = phys_offset;
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p->phys_offset = phys_offset;
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if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM)
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if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM ||
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(phys_offset & IO_MEM_ROMD))
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phys_offset += TARGET_PAGE_SIZE;
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phys_offset += TARGET_PAGE_SIZE;
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}
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}
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}
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}
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@ -2048,7 +2049,8 @@ void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
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}
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}
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}
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}
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} else {
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} else {
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if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM) {
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if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
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!(pd & IO_MEM_ROMD)) {
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/* I/O case */
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/* I/O case */
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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if (l >= 4 && ((addr & 3) == 0)) {
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if (l >= 4 && ((addr & 3) == 0)) {
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@ -2103,7 +2105,8 @@ void cpu_physical_memory_write_rom(target_phys_addr_t addr,
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}
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}
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if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM &&
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if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM &&
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(pd & ~TARGET_PAGE_MASK) != IO_MEM_ROM) {
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(pd & ~TARGET_PAGE_MASK) != IO_MEM_ROM &&
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!(pd & IO_MEM_ROMD)) {
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/* do nothing */
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/* do nothing */
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} else {
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} else {
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unsigned long addr1;
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unsigned long addr1;
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@ -2135,7 +2138,8 @@ uint32_t ldl_phys(target_phys_addr_t addr)
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pd = p->phys_offset;
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pd = p->phys_offset;
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}
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}
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if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM) {
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if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
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!(pd & IO_MEM_ROMD)) {
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/* I/O case */
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/* I/O case */
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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val = io_mem_read[io_index][2](io_mem_opaque[io_index], addr);
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val = io_mem_read[io_index][2](io_mem_opaque[io_index], addr);
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@ -2164,7 +2168,8 @@ uint64_t ldq_phys(target_phys_addr_t addr)
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pd = p->phys_offset;
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pd = p->phys_offset;
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}
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}
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if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM) {
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if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
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!(pd & IO_MEM_ROMD)) {
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/* I/O case */
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/* I/O case */
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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#ifdef TARGET_WORDS_BIGENDIAN
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#ifdef TARGET_WORDS_BIGENDIAN
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