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msix: fix reset value for enable bit 

On reset, we currently clear all bits in msix control register *except*
enable bit.  This is wrong: the spec says we should clear writeable
bits: function mask and enable bit.
Correct this.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Michael S. Tsirkin 2009-11-25 12:00:10 +02:00
parent ae1be0bbc1
commit 1f944c661a
1 changed files with 2 additions and 1 deletions
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3
hw/msix.c
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@ -361,7 +361,8 @@ void msix_reset(PCIDevice *dev)
if (!(dev->cap_present & QEMU_PCI_CAP_MSIX)) if (!(dev->cap_present & QEMU_PCI_CAP_MSIX))
return; return;
msix_free_irq_entries(dev); msix_free_irq_entries(dev);
dev->config[dev->msix_cap + MSIX_ENABLE_OFFSET] &= MSIX_ENABLE_MASK; dev->config[dev->msix_cap + MSIX_ENABLE_OFFSET] &=
~dev->wmask[dev->msix_cap + MSIX_ENABLE_OFFSET];
memset(dev->msix_table_page, 0, MSIX_PAGE_SIZE); memset(dev->msix_table_page, 0, MSIX_PAGE_SIZE);
msix_mask_all(dev, dev->msix_entries_nr); msix_mask_all(dev, dev->msix_entries_nr);
} }