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target/xtensa: extract test for debug exception 

- mark break and break.n instructions;
- collect debug cause bits from parameter 0 of instructions marked for
  debug exception;
- put debug exception check right after syscall check;

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2018-08-28 14:52:27 -07:00
parent 4c6ec5f3cd
commit 1547781942
1 changed files with 13 additions and 10 deletions
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23
target/xtensa/translate.c
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@ -959,6 +959,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
uint32_t arg[MAX_OPCODE_ARGS]; uint32_t arg[MAX_OPCODE_ARGS];
uint32_t raw_arg[MAX_OPCODE_ARGS]; uint32_t raw_arg[MAX_OPCODE_ARGS];
} slot_prop[MAX_INSN_SLOTS]; } slot_prop[MAX_INSN_SLOTS];
uint32_t debug_cause = 0;
if (len == XTENSA_UNDEFINED) { if (len == XTENSA_UNDEFINED) {
qemu_log_mask(LOG_GUEST_ERROR, qemu_log_mask(LOG_GUEST_ERROR,
@ -1040,6 +1041,9 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE); gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);
return; return;
} }
if (ops->op_flags & XTENSA_OP_DEBUG_BREAK) {
debug_cause |= ops->par[0];
}
} }
if ((op_flags & XTENSA_OP_PRIVILEGED) && if ((op_flags & XTENSA_OP_PRIVILEGED) &&
@ -1052,6 +1056,11 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
return; return;
} }
if ((op_flags & XTENSA_OP_DEBUG_BREAK) && dc->debug) {
gen_debug_exception(dc, debug_cause);
return;
}
for (slot = 0; slot < slots; ++slot) { for (slot = 0; slot < slots; ++slot) {
XtensaOpcodeOps *ops = slot_prop[slot].ops; XtensaOpcodeOps *ops = slot_prop[slot].ops;
@ -1515,14 +1524,6 @@ static void translate_bp(DisasContext *dc, const uint32_t arg[],
tcg_temp_free(tmp); tcg_temp_free(tmp);
} }
static void translate_break(DisasContext *dc, const uint32_t arg[],
const uint32_t par[])
{
if (dc->debug) {
gen_debug_exception(dc, par[0]);
}
}
static void translate_call0(DisasContext *dc, const uint32_t arg[], static void translate_call0(DisasContext *dc, const uint32_t arg[],
const uint32_t par[]) const uint32_t par[])
{ {
@ -2827,12 +2828,14 @@ static const XtensaOpcodeOps core_ops[] = {
.par = (const uint32_t[]){TCG_COND_EQ}, .par = (const uint32_t[]){TCG_COND_EQ},
}, { }, {
.name = "break", .name = "break",
.translate = translate_break, .translate = translate_nop,
.par = (const uint32_t[]){DEBUGCAUSE_BI}, .par = (const uint32_t[]){DEBUGCAUSE_BI},
.op_flags = XTENSA_OP_DEBUG_BREAK,
}, { }, {
.name = "break.n", .name = "break.n",
.translate = translate_break, .translate = translate_nop,
.par = (const uint32_t[]){DEBUGCAUSE_BN}, .par = (const uint32_t[]){DEBUGCAUSE_BN},
.op_flags = XTENSA_OP_DEBUG_BREAK,
}, { }, {
.name = "bt", .name = "bt",
.translate = translate_bp, .translate = translate_bp,