mirror of https://github.com/xqemu/xqemu.git
NVRAM fixes (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@815 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
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ef792f9ddb
commit
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43
hw/m48t59.c
43
hw/m48t59.c
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@ -24,9 +24,9 @@
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#include "vl.h"
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#include "vl.h"
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#include "m48t59.h"
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#include "m48t59.h"
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//#define NVRAM_DEBUG
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//#define DEBUG_NVRAM
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#if defined(NVRAM_DEBUG)
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#if defined(DEBUG_NVRAM)
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#define NVRAM_PRINTF(fmt, args...) do { printf(fmt , ##args); } while (0)
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#define NVRAM_PRINTF(fmt, args...) do { printf(fmt , ##args); } while (0)
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#else
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#else
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#define NVRAM_PRINTF(fmt, args...) do { } while (0)
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#define NVRAM_PRINTF(fmt, args...) do { } while (0)
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@ -45,6 +45,7 @@ struct m48t59_t {
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struct QEMUTimer *alrm_timer;
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struct QEMUTimer *alrm_timer;
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struct QEMUTimer *wd_timer;
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struct QEMUTimer *wd_timer;
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/* NVRAM storage */
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/* NVRAM storage */
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uint8_t lock;
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uint16_t addr;
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uint16_t addr;
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uint8_t *buffer;
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uint8_t *buffer;
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};
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};
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@ -152,7 +153,10 @@ static void watchdog_cb (void *opaque)
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if (NVRAM->buffer[0x1FF7] & 0x80) {
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if (NVRAM->buffer[0x1FF7] & 0x80) {
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NVRAM->buffer[0x1FF7] = 0x00;
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NVRAM->buffer[0x1FF7] = 0x00;
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NVRAM->buffer[0x1FFC] &= ~0x40;
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NVRAM->buffer[0x1FFC] &= ~0x40;
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// reset_CPU();
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/* May it be a hw CPU Reset instead ? */
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reset_requested = 1;
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printf("Watchdog reset...\n");
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cpu_interrupt(cpu_single_env, CPU_INTERRUPT_EXIT);
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} else {
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} else {
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pic_set_irq(NVRAM->IRQ, 1);
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pic_set_irq(NVRAM->IRQ, 1);
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pic_set_irq(NVRAM->IRQ, 0);
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pic_set_irq(NVRAM->IRQ, 0);
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@ -315,6 +319,11 @@ void m48t59_write (m48t59_t *NVRAM, uint32_t val)
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}
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}
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break;
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break;
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default:
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default:
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/* Check lock registers state */
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if (NVRAM->addr >= 0x20 && NVRAM->addr <= 0x2F && (NVRAM->lock & 1))
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break;
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if (NVRAM->addr >= 0x30 && NVRAM->addr <= 0x3F && (NVRAM->lock & 2))
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break;
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if (NVRAM->addr < 0x1FF0 ||
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if (NVRAM->addr < 0x1FF0 ||
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(NVRAM->addr > 0x1FFF && NVRAM->addr < NVRAM->size)) {
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(NVRAM->addr > 0x1FFF && NVRAM->addr < NVRAM->size)) {
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NVRAM->buffer[NVRAM->addr] = val & 0xFF;
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NVRAM->buffer[NVRAM->addr] = val & 0xFF;
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@ -394,6 +403,11 @@ uint32_t m48t59_read (m48t59_t *NVRAM)
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retval = toBCD(tm.tm_year);
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retval = toBCD(tm.tm_year);
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break;
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break;
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default:
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default:
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/* Check lock registers state */
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if (NVRAM->addr >= 0x20 && NVRAM->addr <= 0x2F && (NVRAM->lock & 1))
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break;
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if (NVRAM->addr >= 0x30 && NVRAM->addr <= 0x3F && (NVRAM->lock & 2))
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break;
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if (NVRAM->addr < 0x1FF0 ||
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if (NVRAM->addr < 0x1FF0 ||
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(NVRAM->addr > 0x1FFF && NVRAM->addr < NVRAM->size)) {
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(NVRAM->addr > 0x1FFF && NVRAM->addr < NVRAM->size)) {
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do_read:
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do_read:
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@ -412,12 +426,18 @@ void m48t59_set_addr (m48t59_t *NVRAM, uint32_t addr)
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NVRAM->addr = addr;
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NVRAM->addr = addr;
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}
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}
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void m48t59_toggle_lock (m48t59_t *NVRAM, int lock)
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{
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NVRAM->lock ^= 1 << lock;
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}
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/* IO access to NVRAM */
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/* IO access to NVRAM */
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static void NVRAM_writeb (void *opaque, uint32_t addr, uint32_t val)
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static void NVRAM_writeb (void *opaque, uint32_t addr, uint32_t val)
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{
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{
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m48t59_t *NVRAM = opaque;
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m48t59_t *NVRAM = opaque;
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addr -= NVRAM->io_base;
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addr -= NVRAM->io_base;
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NVRAM_PRINTF("0x%08x => 0x%08x\n", addr, val);
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switch (addr) {
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switch (addr) {
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case 0:
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case 0:
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NVRAM->addr &= ~0x00FF;
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NVRAM->addr &= ~0x00FF;
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@ -439,11 +459,20 @@ static void NVRAM_writeb (void *opaque, uint32_t addr, uint32_t val)
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static uint32_t NVRAM_readb (void *opaque, uint32_t addr)
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static uint32_t NVRAM_readb (void *opaque, uint32_t addr)
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{
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{
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m48t59_t *NVRAM = opaque;
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m48t59_t *NVRAM = opaque;
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uint32_t retval;
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if (addr == NVRAM->io_base + 3)
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addr -= NVRAM->io_base;
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return m48t59_read(NVRAM);
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switch (addr) {
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case 3:
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retval = m48t59_read(NVRAM);
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break;
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default:
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retval = -1;
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break;
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}
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NVRAM_PRINTF("0x%08x <= 0x%08x\n", addr, retval);
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return 0xFF;
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return retval;
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}
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}
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/* Initialisation routine */
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/* Initialisation routine */
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@ -467,5 +496,7 @@ m48t59_t *m48t59_init (int IRQ, uint32_t io_base, uint16_t size)
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register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s);
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register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s);
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s->alrm_timer = qemu_new_timer(vm_clock, &alarm_cb, s);
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s->alrm_timer = qemu_new_timer(vm_clock, &alarm_cb, s);
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s->wd_timer = qemu_new_timer(vm_clock, &watchdog_cb, s);
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s->wd_timer = qemu_new_timer(vm_clock, &watchdog_cb, s);
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s->lock = 0;
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return s;
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return s;
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}
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}
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