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Make the Malta bootloader handling a bit more transparent. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2949 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-06-06 17:19:24 +00:00
parent acdf72bbac
commit 070ce5edc3
1 changed files with 17 additions and 14 deletions
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31
hw/mips_malta.c
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@ -778,9 +778,23 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device,
cpu_register_physical_memory(0x1fc00000LL, cpu_register_physical_memory(0x1fc00000LL,
BIOS_SIZE, bios_offset | IO_MEM_ROM); BIOS_SIZE, bios_offset | IO_MEM_ROM);
/* Load a BIOS image except if a kernel image has been specified. In /* FPGA */
the later case, just write a small bootloader to the flash malta_fpga = malta_fpga_init(0x1f000000LL, env);
location. */
/* Load a BIOS image unless a kernel image has been specified. */
if (!kernel_filename) {
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
ret = load_image(buf, phys_ram_base + bios_offset);
if (ret < 0 || ret > BIOS_SIZE) {
fprintf(stderr,
"qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
buf);
exit(1);
}
}
/* If a kernel image has been specified, write a small bootloader
to the flash location. */
if (kernel_filename) { if (kernel_filename) {
env->ram_size = ram_size; env->ram_size = ram_size;
env->kernel_filename = kernel_filename; env->kernel_filename = kernel_filename;
@ -789,14 +803,6 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device,
kernel_entry = load_kernel(env); kernel_entry = load_kernel(env);
env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
write_bootloader(env, bios_offset, kernel_entry); write_bootloader(env, bios_offset, kernel_entry);
} else {
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
ret = load_image(buf, phys_ram_base + bios_offset);
if (ret < 0 || ret > BIOS_SIZE) {
fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
buf);
exit(1);
}
} }
/* Board ID = 0x420 (Malta Board with CoreLV) /* Board ID = 0x420 (Malta Board with CoreLV)
@ -809,9 +815,6 @@ void mips_malta_init (int ram_size, int vga_ram_size, int boot_device,
cpu_mips_clock_init(env); cpu_mips_clock_init(env);
cpu_mips_irqctrl_init(); cpu_mips_irqctrl_init();
/* FPGA */
malta_fpga = malta_fpga_init(0x1f000000LL, env);
/* Interrupt controller */ /* Interrupt controller */
/* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */ /* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */
i8259 = i8259_init(env->irq[2]); i8259 = i8259_init(env->irq[2]);