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tests/tcg/xtensa: conditionalize and fix s32c1i tests 

Make s32c1i tests conditional on the presence of this option. Initialize
ATOMCTL SR when it's present to allow RCW transactions on uncached
memory.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2019-02-18 07:15:10 -08:00
parent 9b2d08a066
commit 00988da486
1 changed files with 12 additions and 0 deletions
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12
tests/tcg/xtensa/test_s32c1i.S
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@ -2,7 +2,13 @@
test_suite s32c1i test_suite s32c1i
#if XCHAL_HAVE_S32C1I
test s32c1i_nowrite test s32c1i_nowrite
#if XCHAL_HW_VERSION >= 230000
movi a2, 0x29
wsr a2, atomctl
#endif
movi a2, 1f movi a2, 1f
movi a3, 1 movi a3, 1
wsr a3, scompare1 wsr a3, scompare1
@ -20,6 +26,10 @@ test s32c1i_nowrite
test_end test_end
test s32c1i_write test s32c1i_write
#if XCHAL_HW_VERSION >= 230000
movi a2, 0x29
wsr a2, atomctl
#endif
movi a2, 1f movi a2, 1f
movi a3, 3 movi a3, 3
wsr a3, scompare1 wsr a3, scompare1
@ -36,4 +46,6 @@ test s32c1i_write
.text .text
test_end test_end
#endif
test_suite_end test_suite_end