Fixing warnings on mtmsr/mtmsrd disasm.
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@ -225,14 +225,14 @@ XEDISASMR(mfmsr, 0x7C0000A6, X)(InstrData& i, InstrDisasm& d) {
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XEDISASMR(mtmsr, 0x7C000124, X)(InstrData& i, InstrDisasm& d) {
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XEDISASMR(mtmsr, 0x7C000124, X)(InstrData& i, InstrDisasm& d) {
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d.Init("mtmsr", "Move To Machine State Register", 0);
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d.Init("mtmsr", "Move To Machine State Register", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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d.AddSImmOperand((i.X.RA & 16 != 0) ? 1 : 0, 1);
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d.AddSImmOperand((i.X.RA & 16) ? 1 : 0, 1);
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return d.Finish();
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return d.Finish();
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}
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}
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XEDISASMR(mtmsrd, 0x7C000164, X)(InstrData& i, InstrDisasm& d) {
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XEDISASMR(mtmsrd, 0x7C000164, X)(InstrData& i, InstrDisasm& d) {
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d.Init("mtmsrd", "Move To Machine State Register Doubleword", 0);
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d.Init("mtmsrd", "Move To Machine State Register Doubleword", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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d.AddSImmOperand((i.X.RA & 16 != 0) != 0 ? 1 : 0, 1);
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d.AddSImmOperand((i.X.RA & 16) ? 1 : 0, 1);
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return d.Finish();
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return d.Finish();
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}
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}
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