From fc8eb3d40aa8dfe629fb069944658fdfeaae95b0 Mon Sep 17 00:00:00 2001
From: Ben Vanik <ben.vanik@gmail.com>
Date: Thu, 23 May 2013 11:39:29 -0700
Subject: [PATCH] Adding disassembly to traces and bumping libjit.

---
 src/xenia/cpu/global_exports.cc | 26 ++++++++++++++++++++------
 third_party/libjit              |  2 +-
 2 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/src/xenia/cpu/global_exports.cc b/src/xenia/cpu/global_exports.cc
index b673dc953..1216557e5 100644
--- a/src/xenia/cpu/global_exports.cc
+++ b/src/xenia/cpu/global_exports.cc
@@ -98,13 +98,27 @@ void _cdecl XeTraceBranch(
 
 void _cdecl XeTraceInstruction(
     xe_ppc_state_t* state, uint64_t cia, uint64_t data) {
-  ppc::InstrType* type = ppc::GetInstrType((uint32_t)data);
-  XELOGCPU("TRACE: %.8X %.8X %s %s",
-           cia, data,
-           type && type->emit ? " " : "X",
-           type ? type->name : "<unknown>");
+  ppc::InstrData i;
+  i.address = (uint32_t)cia;
+  i.code = (uint32_t)data;
+  i.type = ppc::GetInstrType(i.code);
+  if (i.type && i.type->disassemble) {
+    ppc::InstrDisasm d;
+    i.type->disassemble(i, d);
+    std::string disasm;
+    d.Dump(disasm);
+    XELOGCPU("TRACE: %.8X %.8X %s %s",
+           i.address, i.code,
+           i.type && i.type->emit ? " " : "X",
+           disasm.c_str());
+  } else {
+    XELOGCPU("TRACE: %.8X %.8X %s %s",
+           i.address, i.code,
+           i.type && i.type->emit ? " " : "X",
+           i.type ? i.type->name : "<unknown>");
+  }
 
-  // if (cia == 0x82014468) {
+  // if (cia == 0x82012074) {
   //   printf("BREAKBREAKBREAK\n");
   // }
 
diff --git a/third_party/libjit b/third_party/libjit
index 8f6f77b1b..a37e442c5 160000
--- a/third_party/libjit
+++ b/third_party/libjit
@@ -1 +1 @@
-Subproject commit 8f6f77b1b5734ec205869e117eb8094323839091
+Subproject commit a37e442c53f847d6c80b4007a3d626bc382038dd