From f3a196c02fc5362ca6053455ec4346e4aaae3c3f Mon Sep 17 00:00:00 2001 From: Ben Vanik Date: Sat, 13 Sep 2014 20:47:38 -0700 Subject: [PATCH] Extra rldicl test. --- src/alloy/frontend/ppc/test/bin/instr_rldicl.bin | Bin 72 -> 80 bytes src/alloy/frontend/ppc/test/bin/instr_rldicl.dis | 4 ++++ src/alloy/frontend/ppc/test/bin/instr_rldicl.map | 1 + src/alloy/frontend/ppc/test/instr_rldicl.s | 7 +++++++ src/alloy/frontend/ppc/test/instr_rlwimi.s | 2 -- 5 files changed, 12 insertions(+), 2 deletions(-) diff --git a/src/alloy/frontend/ppc/test/bin/instr_rldicl.bin b/src/alloy/frontend/ppc/test/bin/instr_rldicl.bin index 4ff0f0586c3590d3108eb28ffcaa190f2ed7e24c..121cb7ff60d0d56282a50d9e807cfab1de803a46 100644 GIT binary patch delta 13 UcmeYWnBc)t(R{JVuYo}U03uohwEzGB delta 4 LcmWIWnBV~b1B3x_ diff --git a/src/alloy/frontend/ppc/test/bin/instr_rldicl.dis b/src/alloy/frontend/ppc/test/bin/instr_rldicl.dis index d3dc12986..6aea8f574 100644 --- a/src/alloy/frontend/ppc/test/bin/instr_rldicl.dis +++ b/src/alloy/frontend/ppc/test/bin/instr_rldicl.dis @@ -39,3 +39,7 @@ Disassembly of section .text: 0000000000100040 : 100040: 78 83 f8 00 rotldi r3,r4,31 100044: 4e 80 00 20 blr + +0000000000100048 : + 100048: 78 83 d1 82 rldicl r3,r4,58,6 + 10004c: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_rldicl.map b/src/alloy/frontend/ppc/test/bin/instr_rldicl.map index 6bc8f0d85..c581b1fcc 100644 --- a/src/alloy/frontend/ppc/test/bin/instr_rldicl.map +++ b/src/alloy/frontend/ppc/test/bin/instr_rldicl.map @@ -7,3 +7,4 @@ 0000000000000030 t test_rldicl_7 0000000000000038 t test_rldicl_8 0000000000000040 t test_rldicl_9 +0000000000000048 t test_rldicl_10 diff --git a/src/alloy/frontend/ppc/test/instr_rldicl.s b/src/alloy/frontend/ppc/test/instr_rldicl.s index c23d8554b..2f55ff595 100644 --- a/src/alloy/frontend/ppc/test/instr_rldicl.s +++ b/src/alloy/frontend/ppc/test/instr_rldicl.s @@ -60,3 +60,10 @@ test_rldicl_9: blr #_ REGISTER_OUT r3 0xc4d5e6f78091a2b3 #_ REGISTER_OUT r4 0x0123456789ABCDEF + +test_rldicl_10: + #_ REGISTER_IN r4 0x16300000 + rldicl r3, r4, 58, 6 + blr + #_ REGISTER_OUT r3 0x58C000 + #_ REGISTER_OUT r4 0x16300000 diff --git a/src/alloy/frontend/ppc/test/instr_rlwimi.s b/src/alloy/frontend/ppc/test/instr_rlwimi.s index dadf4791c..95db67005 100644 --- a/src/alloy/frontend/ppc/test/instr_rlwimi.s +++ b/src/alloy/frontend/ppc/test/instr_rlwimi.s @@ -1,9 +1,7 @@ test_rlwimi: #_ REGISTER_IN r4 0xCAFEBABE90003000 #_ REGISTER_IN r6 0xDEADBEEF00000003 - rlwimi r6, r4, 2, 0, 0x1D - blr #_ REGISTER_OUT r4 0xCAFEBABE90003000 #_ REGISTER_OUT r6 0xDEADBEEF4000C003