Fixing SHR_V128.

src/xenia/cpu/backend/x64/x64_sequences.cc

@@ -4568,11 +4568,11 @@ EMITTER(SHR_V128, MATCH(I<OPCODE_SHR, V128<>, V128<>, I8<>>)) {
     uint8_t shamt = src2 & 0x7;
     alignas(16) vec128_t value;
     _mm_store_si128(reinterpret_cast<__m128i*>(&value), src1);
-    value.u8[0 ^ 0x3] = value.u8[0 ^ 0x3] >> shamt;
     for (int i = 15; i > 0; --i) {
       value.u8[i ^ 0x3] = (value.u8[i ^ 0x3] >> shamt) |
                           (value.u8[(i - 1) ^ 0x3] << (8 - shamt));
     }
+    value.u8[0 ^ 0x3] = value.u8[0 ^ 0x3] >> shamt;
     return _mm_load_si128(reinterpret_cast<__m128i*>(&value));
   }
 };

src/xenia/cpu/frontend/test/xe-cpu-ppc-test.vcxproj

@@ -227,6 +227,7 @@
     <None Include="instr_vspltish.s" />
     <None Include="instr_vspltisw.s" />
     <None Include="instr_vspltw.s" />
+    <None Include="instr_vsr.s" />
     <None Include="instr_vsubshs.s" />
     <None Include="instr_vsubuhm.s" />
     <None Include="instr_vupkd3d128.s" />

src/xenia/cpu/frontend/test/xe-cpu-ppc-test.vcxproj.filters

@@ -120,6 +120,7 @@
     <None Include="instr_vmaddfp.s" />
     <None Include="instr_vmsum4fp128.s" />
     <None Include="jumptable_constants.s" />
+    <None Include="instr_vsr.s" />
   </ItemGroup>
   <ItemGroup>
     <Filter Include="src">