diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso index 2a0fef903..6df4fdb71 100644 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso and b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h index cb8df13ca..5ee3ffd11 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h @@ -1,14 +1,14 @@ // generated from `xb buildhlsl` // source: primitive_point_list.gs.hlsl const uint8_t primitive_point_list_gs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC3, 0xAE, 0x1C, 0x44, 0xFA, 0x20, 0xBB, 0xA4, - 0x2C, 0x9C, 0x3E, 0xB6, 0x00, 0x7E, 0x0B, 0x06, 0x01, 0x00, 0x00, 0x00, - 0xFC, 0x1A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD8, 0x0A, 0x00, 0x00, 0xB0, 0x0C, 0x00, 0x00, 0xD0, 0x0E, 0x00, 0x00, - 0x60, 0x1A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x9C, 0x0A, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0xE4, 0x39, 0x9A, 0x8D, 0x89, 0x26, 0x9C, 0xB4, + 0xF8, 0xED, 0x24, 0xBD, 0x56, 0xB2, 0x89, 0xBF, 0x01, 0x00, 0x00, 0x00, + 0x40, 0x1C, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x1C, 0x0C, 0x00, 0x00, 0xF4, 0x0D, 0x00, 0x00, 0x14, 0x10, 0x00, 0x00, + 0xA4, 0x1B, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xE0, 0x0B, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x47, 0x00, 0x05, 0x00, 0x00, - 0x71, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0xB8, 0x0B, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -16,223 +16,250 @@ const uint8_t primitive_point_list_gs[] = { 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, 0x72, 0x00, 0xAB, 0xAB, - 0x64, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0xB0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x30, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x40, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x64, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, + 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xF8, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x64, 0x06, 0x00, 0x00, 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[unused] // uint4 xe_color_output_map; // Offset: 112 Size: 16 [unused] -// uint4 xe_edram_base_dwords; // Offset: 128 Size: 16 [unused] -// uint4 xe_edram_rt_flags; // Offset: 144 Size: 16 [unused] -// uint4 xe_edram_rt_pack_width_low; // Offset: 160 Size: 16 [unused] -// uint4 xe_edram_rt_pack_offset_low; // Offset: 176 Size: 16 [unused] -// uint4 xe_edram_rt_pack_width_high; // Offset: 192 Size: 16 [unused] -// uint4 xe_edram_rt_pack_offset_high;// Offset: 208 Size: 16 [unused] -// uint4 xe_edram_load_mask_rt01; // Offset: 224 Size: 16 [unused] -// uint4 xe_edram_load_mask_rt23; // Offset: 240 Size: 16 [unused] -// float4 xe_edram_load_scale_rt01; // Offset: 256 Size: 16 [unused] -// float4 xe_edram_load_scale_rt23; // Offset: 272 Size: 16 [unused] -// uint4 xe_edram_blend_rt01; // Offset: 288 Size: 16 [unused] -// uint4 xe_edram_blend_rt23; // Offset: 304 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 320 Size: 16 [unused] -// float4 xe_edram_store_min_rt01; // Offset: 336 Size: 16 [unused] -// float4 xe_edram_store_min_rt23; // Offset: 352 Size: 16 [unused] -// float4 xe_edram_store_max_rt01; // Offset: 368 Size: 16 [unused] -// float4 xe_edram_store_max_rt23; // Offset: 384 Size: 16 [unused] -// float4 xe_edram_store_scale_rt01; // Offset: 400 Size: 16 [unused] -// float4 xe_edram_store_scale_rt23; // Offset: 416 Size: 16 [unused] +// uint xe_edram_stencil_reference; // Offset: 128 Size: 4 [unused] +// uint xe_edram_stencil_read_mask; // Offset: 132 Size: 4 [unused] +// uint xe_edram_stencil_write_mask; // Offset: 136 Size: 4 [unused] +// uint4 xe_edram_stencil_front; // Offset: 144 Size: 16 [unused] +// uint4 xe_edram_stencil_back; // Offset: 160 Size: 16 [unused] +// uint4 xe_edram_base_dwords; // Offset: 176 Size: 16 [unused] +// uint4 xe_edram_rt_flags; // Offset: 192 Size: 16 [unused] +// uint4 xe_edram_rt_pack_width_low; // Offset: 208 Size: 16 [unused] +// uint4 xe_edram_rt_pack_offset_low; // Offset: 224 Size: 16 [unused] +// uint4 xe_edram_rt_pack_width_high; // Offset: 240 Size: 16 [unused] +// uint4 xe_edram_rt_pack_offset_high;// Offset: 256 Size: 16 [unused] +// uint4 xe_edram_load_mask_rt01; // Offset: 272 Size: 16 [unused] +// uint4 xe_edram_load_mask_rt23; // Offset: 288 Size: 16 [unused] +// float4 xe_edram_load_scale_rt01; // Offset: 304 Size: 16 [unused] +// float4 xe_edram_load_scale_rt23; // Offset: 320 Size: 16 [unused] +// uint4 xe_edram_blend_rt01; // Offset: 336 Size: 16 [unused] +// uint4 xe_edram_blend_rt23; // Offset: 352 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 368 Size: 16 [unused] +// float4 xe_edram_store_min_rt01; // Offset: 384 Size: 16 [unused] +// float4 xe_edram_store_min_rt23; // Offset: 400 Size: 16 [unused] +// float4 xe_edram_store_max_rt01; // Offset: 416 Size: 16 [unused] +// float4 xe_edram_store_max_rt23; // Offset: 432 Size: 16 [unused] +// float4 xe_edram_store_scale_rt01; // Offset: 448 Size: 16 [unused] +// float4 xe_edram_store_scale_rt23; // Offset: 464 Size: 16 [unused] // // } // diff --git a/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli b/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli index 31b8d3b9a..06ffc2cc1 100644 --- a/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli +++ b/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli @@ -28,42 +28,50 @@ cbuffer xe_system_cbuffer : register(b0) { // vec4 7 uint4 xe_color_output_map; // vec4 8 - uint4 xe_edram_base_dwords; + uint xe_edram_stencil_reference; + uint xe_edram_stencil_read_mask; + uint xe_edram_stencil_write_mask; // vec4 9 - uint4 xe_edram_rt_flags; + uint4 xe_edram_stencil_front; // vec4 10 - uint4 xe_edram_rt_pack_width_low; + uint4 xe_edram_stencil_back; // vec4 11 - uint4 xe_edram_rt_pack_offset_low; + uint4 xe_edram_base_dwords; // vec4 12 - uint4 xe_edram_rt_pack_width_high; + uint4 xe_edram_rt_flags; // vec4 13 - uint4 xe_edram_rt_pack_offset_high; + uint4 xe_edram_rt_pack_width_low; // vec4 14 - uint4 xe_edram_load_mask_rt01; + uint4 xe_edram_rt_pack_offset_low; // vec4 15 - uint4 xe_edram_load_mask_rt23; + uint4 xe_edram_rt_pack_width_high; // vec4 16 - float4 xe_edram_load_scale_rt01; + uint4 xe_edram_rt_pack_offset_high; // vec4 17 - float4 xe_edram_load_scale_rt23; + uint4 xe_edram_load_mask_rt01; // vec4 18 - uint4 xe_edram_blend_rt01; + uint4 xe_edram_load_mask_rt23; // vec4 19 - uint4 xe_edram_blend_rt23; + float4 xe_edram_load_scale_rt01; // vec4 20 - float4 xe_edram_blend_constant; + float4 xe_edram_load_scale_rt23; // vec4 21 - float4 xe_edram_store_min_rt01; + uint4 xe_edram_blend_rt01; // vec4 22 - float4 xe_edram_store_min_rt23; + uint4 xe_edram_blend_rt23; // vec4 23 - float4 xe_edram_store_max_rt01; + float4 xe_edram_blend_constant; // vec4 24 - float4 xe_edram_store_max_rt23; + float4 xe_edram_store_min_rt01; // vec4 25 - float4 xe_edram_store_scale_rt01; + float4 xe_edram_store_min_rt23; // vec4 26 + float4 xe_edram_store_max_rt01; + // vec4 27 + float4 xe_edram_store_max_rt23; + // vec4 28 + float4 xe_edram_store_scale_rt01; + // vec4 29 float4 xe_edram_store_scale_rt23; }; diff --git a/src/xenia/gpu/dxbc_shader_translator.cc b/src/xenia/gpu/dxbc_shader_translator.cc index 1f058aa75..11b024749 100644 --- a/src/xenia/gpu/dxbc_shader_translator.cc +++ b/src/xenia/gpu/dxbc_shader_translator.cc @@ -10842,43 +10842,51 @@ const DxbcShaderTranslator::SystemConstantRdef DxbcShaderTranslator:: // vec4 7 {"xe_color_output_map", RdefTypeIndex::kUint4, 112, 16}, // vec4 8 - {"xe_edram_base_dwords", RdefTypeIndex::kUint4, 128, 16}, + {"xe_edram_stencil_reference", RdefTypeIndex::kUint, 128, 4}, + {"xe_edram_stencil_read_mask", RdefTypeIndex::kUint, 132, 4}, + {"xe_edram_stencil_write_mask", RdefTypeIndex::kUint, 136, 4}, // vec4 9 - {"xe_edram_rt_flags", RdefTypeIndex::kUint4, 144, 16}, + {"xe_edram_stencil_front", RdefTypeIndex::kUint4, 144, 16}, // vec4 10 - {"xe_edram_rt_pack_width_low", RdefTypeIndex::kUint4, 160, 16}, + {"xe_edram_stencil_back", RdefTypeIndex::kUint4, 160, 16}, // vec4 11 - {"xe_edram_rt_pack_offset_low", RdefTypeIndex::kUint4, 176, 16}, + {"xe_edram_base_dwords", RdefTypeIndex::kUint4, 176, 16}, // vec4 12 - {"xe_edram_rt_pack_width_high", RdefTypeIndex::kUint4, 192, 16}, + {"xe_edram_rt_flags", RdefTypeIndex::kUint4, 192, 16}, // vec4 13 - {"xe_edram_rt_pack_offset_high", RdefTypeIndex::kUint4, 208, 16}, + {"xe_edram_rt_pack_width_low", RdefTypeIndex::kUint4, 208, 16}, // vec4 14 - {"xe_edram_load_mask_low_rt01", RdefTypeIndex::kUint4, 224, 16}, + {"xe_edram_rt_pack_offset_low", RdefTypeIndex::kUint4, 224, 16}, // vec4 15 - {"xe_edram_load_mask_low_rt23", RdefTypeIndex::kUint4, 240, 16}, + {"xe_edram_rt_pack_width_high", RdefTypeIndex::kUint4, 240, 16}, // vec4 16 - {"xe_edram_load_scale_rt01", RdefTypeIndex::kFloat4, 256, 16}, + {"xe_edram_rt_pack_offset_high", RdefTypeIndex::kUint4, 256, 16}, // vec4 17 - {"xe_edram_load_scale_rt23", RdefTypeIndex::kFloat4, 272, 16}, + {"xe_edram_load_mask_low_rt01", RdefTypeIndex::kUint4, 272, 16}, // vec4 18 - {"xe_edram_blend_rt01", RdefTypeIndex::kUint4, 288, 16}, + {"xe_edram_load_mask_low_rt23", RdefTypeIndex::kUint4, 288, 16}, // vec4 19 - {"xe_edram_blend_rt23", RdefTypeIndex::kUint4, 304, 16}, + {"xe_edram_load_scale_rt01", RdefTypeIndex::kFloat4, 304, 16}, // vec4 20 - {"xe_edram_blend_constant", RdefTypeIndex::kFloat4, 320, 16}, + {"xe_edram_load_scale_rt23", RdefTypeIndex::kFloat4, 320, 16}, // vec4 21 - {"xe_edram_store_min_rt01", RdefTypeIndex::kFloat4, 336, 16}, + {"xe_edram_blend_rt01", RdefTypeIndex::kUint4, 336, 16}, // vec4 22 - {"xe_edram_store_min_rt23", RdefTypeIndex::kFloat4, 352, 16}, + {"xe_edram_blend_rt23", RdefTypeIndex::kUint4, 352, 16}, // vec4 23 - {"xe_edram_store_max_rt01", RdefTypeIndex::kFloat4, 368, 16}, + {"xe_edram_blend_constant", RdefTypeIndex::kFloat4, 368, 16}, // vec4 24 - {"xe_edram_store_max_rt23", RdefTypeIndex::kFloat4, 384, 16}, + {"xe_edram_store_min_rt01", RdefTypeIndex::kFloat4, 384, 16}, // vec4 25 - {"xe_edram_store_scale_rt01", RdefTypeIndex::kFloat4, 400, 16}, + {"xe_edram_store_min_rt23", RdefTypeIndex::kFloat4, 400, 16}, // vec4 26 - {"xe_edram_store_scale_rt23", RdefTypeIndex::kFloat4, 416, 16}, + {"xe_edram_store_max_rt01", RdefTypeIndex::kFloat4, 416, 16}, + // vec4 27 + {"xe_edram_store_max_rt23", RdefTypeIndex::kFloat4, 432, 16}, + // vec4 28 + {"xe_edram_store_scale_rt01", RdefTypeIndex::kFloat4, 448, 16}, + // vec4 29 + {"xe_edram_store_scale_rt23", RdefTypeIndex::kFloat4, 464, 16}, }; void DxbcShaderTranslator::WriteResourceDefinitions() { diff --git a/src/xenia/gpu/dxbc_shader_translator.h b/src/xenia/gpu/dxbc_shader_translator.h index c2185fe85..52c0fc36d 100644 --- a/src/xenia/gpu/dxbc_shader_translator.h +++ b/src/xenia/gpu/dxbc_shader_translator.h @@ -76,6 +76,37 @@ class DxbcShaderTranslator : public ShaderTranslator { kSysFlag_Color3Gamma = 1u << kSysFlag_Color3Gamma_Shift, }; + enum : uint32_t { + kStencilOp_Flag_CurrentMask_Shift, + kStencilOp_Flag_Invert_Shift, + // 0, 1 or 3 expanded to 0 or 1 or 0xFF - the value to add. + kStencilOp_Flag_Add_Shift, + kStencilOp_Flag_Saturate_Shift = kStencilOp_Flag_Add_Shift + 2, + kStencilOp_Flag_NewMask_Shift, + + kStencilOp_Flag_CurrentMask = 1u << kStencilOp_Flag_CurrentMask_Shift, + kStencilOp_Flag_Invert = 1u << kStencilOp_Flag_Invert_Shift, + kStencilOp_Flag_Increment = 1u << kStencilOp_Flag_Add_Shift, + kStencilOp_Flag_Decrement = 3u << kStencilOp_Flag_Add_Shift, + kStencilOp_Flag_Saturate = 1u << kStencilOp_Flag_Saturate_Shift, + kStencilOp_Flag_NewMask = 1u << kStencilOp_Flag_NewMask_Shift, + + kStencilOp_Keep = kStencilOp_Flag_CurrentMask, + kStencilOp_Zero = 0, + kStencilOp_Replace = kStencilOp_Flag_NewMask, + kStencilOp_IncrementSaturate = kStencilOp_Flag_CurrentMask | + kStencilOp_Flag_Increment | + kStencilOp_Flag_Saturate, + kStencilOp_DecrementSaturate = kStencilOp_Flag_CurrentMask | + kStencilOp_Flag_Decrement | + kStencilOp_Flag_Saturate, + kStencilOp_Invert = kStencilOp_Flag_CurrentMask | kStencilOp_Flag_Invert, + kStencilOp_Increment = + kStencilOp_Flag_CurrentMask | kStencilOp_Flag_Increment, + kStencilOp_Decrement = + kStencilOp_Flag_CurrentMask | kStencilOp_Flag_Decrement, + }; + enum : uint32_t { // Whether the render target needs to be merged with another (if the write // mask is not 1111, or 11 for 16_16, or 1 for 32_FLOAT, or blending is @@ -272,65 +303,95 @@ class DxbcShaderTranslator : public ShaderTranslator { uint32_t color_output_map[4]; // vec4 8 - uint32_t edram_base_dwords[4]; + uint32_t edram_stencil_reference; + uint32_t edram_stencil_read_mask; + uint32_t edram_stencil_write_mask; + uint32_t padding_8; // vec4 9 + union { + struct { + // kStencilOp, separated into sub-operations - not the Xenos enum. + uint32_t edram_stencil_front_fail; + uint32_t edram_stencil_front_depth_fail; + uint32_t edram_stencil_front_pass; + uint32_t edram_stencil_front_comparison; + }; + uint32_t edram_stencil_front[4]; + }; + + // vec4 10 + union { + struct { + // kStencilOp, separated into sub-operations - not the Xenos enum. + uint32_t edram_stencil_back_fail; + uint32_t edram_stencil_back_depth_fail; + uint32_t edram_stencil_back_pass; + uint32_t edram_stencil_back_comparison; + }; + uint32_t edram_stencil_back[4]; + }; + + // vec4 11 + uint32_t edram_base_dwords[4]; + + // vec4 12 // Binding and format info flags. uint32_t edram_rt_flags[4]; - // vec4 10 + // vec4 13 // Format info - widths of components in the lower 32 bits (for ibfe/bfi), // packed as 8:8:8:8 for each render target. uint32_t edram_rt_pack_width_low[4]; - // vec4 11 + // vec4 14 // Format info - offsets of components in the lower 32 bits (for ibfe/bfi), // packed as 8:8:8:8 for each render target. uint32_t edram_rt_pack_offset_low[4]; - // vec4 12 + // vec4 15 // Format info - widths of components in the upper 32 bits (for ibfe/bfi), // packed as 8:8:8:8 for each render target. uint32_t edram_rt_pack_width_high[4]; - // vec4 13 + // vec4 16 // Format info - offsets of components in the upper 32 bits (for ibfe/bfi), // packed as 8:8:8:8 for each render target. uint32_t edram_rt_pack_offset_high[4]; - // vec4 14:15 + // vec4 17:18 // Format info - mask of color and alpha after unpacking, but before float // conversion. Primarily to differentiate between signed and unsigned // formats because ibfe is used for both since k_16_16 and k_16_16_16_16 are // signed. uint32_t edram_load_mask_rt01_rt23[2][4]; - // vec4 16:17 + // vec4 19:20 // Format info - scale to apply to the color and the alpha of each render // target after unpacking and converting. float edram_load_scale_rt01_rt23[2][4]; - // vec4 18:19 + // vec4 21:22 // Render target blending options. uint32_t edram_blend_rt01_rt23[2][4]; - // vec4 20 + // vec4 23 // The constant blend factor for the respective modes. float edram_blend_constant[4]; - // vec4 21:22 + // vec4 24:25 // Format info - minimum color and alpha values (as float, before // conversion) writable to the each render target. Integer so it's easier to // write infinity. uint32_t edram_store_min_rt01_rt23[2][4]; - // vec4 23:24 + // vec4 26:27 // Format info - maximum color and alpha values (as float, before // conversion) writable to the each render target. Integer so it's easier to // write infinity. uint32_t edram_store_max_rt01_rt23[2][4]; - // vec4 25:26 + // vec4 28:29 // Format info - scale to apply to the color and the alpha of each render // target before converting and packing. float edram_store_scale_rt01_rt23[2][4]; @@ -455,14 +516,14 @@ class DxbcShaderTranslator : public ShaderTranslator { kSysConst_PointSizeMinMax_Comp = 2, kSysConst_PointScreenToNDC_Index = kSysConst_PointSizeMinMax_Index + 1, - kSysConst_PointScreenToNDC_Vec = kSysConst_PointSize_Vec + 1, + kSysConst_PointScreenToNDC_Vec = kSysConst_PointSizeMinMax_Vec + 1, kSysConst_PointScreenToNDC_Comp = 0, kSysConst_SSAAInvScale_Index = kSysConst_PointScreenToNDC_Index + 1, kSysConst_SSAAInvScale_Vec = kSysConst_PointScreenToNDC_Vec, kSysConst_SSAAInvScale_Comp = 2, kSysConst_AlphaTestRange_Index = kSysConst_SSAAInvScale_Index + 1, - kSysConst_AlphaTestRange_Vec = kSysConst_PointScreenToNDC_Vec + 1, + kSysConst_AlphaTestRange_Vec = kSysConst_SSAAInvScale_Vec + 1, kSysConst_AlphaTestRange_Comp = 0, kSysConst_EDRAMPitchTiles_Index = kSysConst_AlphaTestRange_Index + 1, kSysConst_EDRAMPitchTiles_Vec = kSysConst_AlphaTestRange_Vec, @@ -472,13 +533,38 @@ class DxbcShaderTranslator : public ShaderTranslator { kSysConst_EDRAMDepthBaseDwords_Comp = 3, kSysConst_ColorExpBias_Index = kSysConst_EDRAMDepthBaseDwords_Index + 1, - kSysConst_ColorExpBias_Vec = kSysConst_AlphaTestRange_Vec + 1, + kSysConst_ColorExpBias_Vec = kSysConst_EDRAMDepthBaseDwords_Vec + 1, kSysConst_ColorOutputMap_Index = kSysConst_ColorExpBias_Index + 1, kSysConst_ColorOutputMap_Vec = kSysConst_ColorExpBias_Vec + 1, - kSysConst_EDRAMBaseDwords_Index = kSysConst_ColorOutputMap_Index + 1, - kSysConst_EDRAMBaseDwords_Vec = kSysConst_ColorOutputMap_Vec + 1, + kSysConst_EDRAMStencilReference_Index = kSysConst_ColorOutputMap_Index + 1, + kSysConst_EDRAMStencilReference_Vec = kSysConst_ColorOutputMap_Vec + 1, + kSysConst_EDRAMStencilReference_Comp = 0, + kSysConst_EDRAMStencilReadMask_Index = + kSysConst_EDRAMStencilReference_Index + 1, + kSysConst_EDRAMStencilReadMask_Vec = kSysConst_EDRAMStencilReference_Vec, + kSysConst_EDRAMStencilReadMask_Comp = 1, + kSysConst_EDRAMStencilWriteMask_Index = + kSysConst_EDRAMStencilReadMask_Index + 1, + kSysConst_EDRAMStencilWriteMask_Vec = kSysConst_EDRAMStencilReference_Vec, + kSysConst_EDRAMStencilWriteMask_Comp = 2, + + kSysConst_EDRAMStencilFront_Index = + kSysConst_EDRAMStencilWriteMask_Index + 1, + kSysConst_EDRAMStencilFront_Vec = kSysConst_EDRAMStencilWriteMask_Vec + 1, + + kSysConst_EDRAMStencilBack_Index = kSysConst_EDRAMStencilFront_Index + 1, + kSysConst_EDRAMStencilBack_Vec = kSysConst_EDRAMStencilFront_Vec + 1, + + // Components of stencil front and back. + kSysConst_EDRAMStencilSide_Fail_Comp = 0, + kSysConst_EDRAMStencilSide_DepthFail_Comp = 1, + kSysConst_EDRAMStencilSide_Pass_Comp = 2, + kSysConst_EDRAMStencilSide_Comparison_Comp = 3, + + kSysConst_EDRAMBaseDwords_Index = kSysConst_EDRAMStencilBack_Index + 1, + kSysConst_EDRAMBaseDwords_Vec = kSysConst_EDRAMStencilBack_Vec + 1, kSysConst_EDRAMRTFlags_Index = kSysConst_EDRAMBaseDwords_Index + 1, kSysConst_EDRAMRTFlags_Vec = kSysConst_EDRAMBaseDwords_Vec + 1,