diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsldoi.bin b/src/alloy/frontend/ppc/test/bin/instr_vsldoi.bin
new file mode 100644
index 000000000..8fda0ff56
Binary files /dev/null and b/src/alloy/frontend/ppc/test/bin/instr_vsldoi.bin differ
diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsldoi.dis b/src/alloy/frontend/ppc/test/bin/instr_vsldoi.dis
new file mode 100644
index 000000000..cc5a2b16a
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/bin/instr_vsldoi.dis
@@ -0,0 +1,17 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_vsldoi.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_vsldoi_1>:
+  100000:	10 a3 20 2c 	vsldoi  v5,v3,v4,0
+  100004:	4e 80 00 20 	blr
+
+0000000000100008 <test_vsldoi_2>:
+  100008:	10 a3 20 6c 	vsldoi  v5,v3,v4,1
+  10000c:	4e 80 00 20 	blr
+
+0000000000100010 <test_vsldoi_3>:
+  100010:	10 a3 23 ec 	vsldoi  v5,v3,v4,15
+  100014:	4e 80 00 20 	blr
diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsldoi.map b/src/alloy/frontend/ppc/test/bin/instr_vsldoi.map
new file mode 100644
index 000000000..e9c64fe09
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/bin/instr_vsldoi.map
@@ -0,0 +1,3 @@
+0000000000000000 t test_vsldoi_1
+0000000000000008 t test_vsldoi_2
+0000000000000010 t test_vsldoi_3
diff --git a/src/alloy/frontend/ppc/test/instr_vsldoi.s b/src/alloy/frontend/ppc/test/instr_vsldoi.s
new file mode 100644
index 000000000..7ab577c82
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/instr_vsldoi.s
@@ -0,0 +1,29 @@
+test_vsldoi_1:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_IN v5 [00000000, 00000000, 00000000, 00000000]
+  vsldoi v5, v3, v4, 0
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+
+test_vsldoi_2:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_IN v5 [00000000, 00000000, 00000000, 00000000]
+  vsldoi v5, v3, v4, 1
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [01020304, 05060708, 090A0B0C, 0D0E0F10]
+
+test_vsldoi_3:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_IN v5 [00000000, 00000000, 00000000, 00000000]
+  vsldoi v5, v3, v4, 0xF
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [0F101112, 13141516, 1718191A, 1B1C1D1E]