[DXBC] Remove alphatest/A2C with [earlydepthstencil]

src/xenia/gpu/dxbc_shader_translator.cc

@@ -3236,7 +3236,8 @@ void DxbcShaderTranslator::WriteOutputSignature() {
 
       // Coverage output for alpha to mask (SV_Coverage).
       size_t coverage_position = SIZE_MAX;
-      if (color_targets_written & 0b1) {
+      if ((color_targets_written & 0b1) &&
+          !IsForceEarlyDepthStencilGlobalFlagEnabled()) {
         coverage_position = shader_object_.size();
         shader_object_.resize(shader_object_.size() + kParameterDwords);
         ++parameter_count;
@@ -3364,14 +3365,11 @@ void DxbcShaderTranslator::WriteShaderCode() {
 
   // Don't allow refactoring when converting to native code to maintain position
   // invariance (needed even in pixel shaders for oDepth invariance).
-  uint32_t global_flags = 0;
-  if (is_pixel_shader() &&
-      GetDxbcShaderModification().pixel.depth_stencil_mode ==
-          Modification::DepthStencilMode::kEarlyHint &&
-      !edram_rov_used_ && current_shader().implicit_early_z_write_allowed()) {
-    global_flags |= dxbc::kGlobalFlagForceEarlyDepthStencil;
-  }
-  ao_.OpDclGlobalFlags(global_flags);
+  bool global_flag_force_early_depth_stencil =
+      IsForceEarlyDepthStencilGlobalFlagEnabled();
+  ao_.OpDclGlobalFlags(global_flag_force_early_depth_stencil
+                           ? dxbc::kGlobalFlagForceEarlyDepthStencil
+                           : 0);
 
   // Constant buffers, from most frequenly accessed to least frequently accessed
   // (the order is a hint to the driver according to the DXBC header).
@@ -3655,7 +3653,8 @@ void DxbcShaderTranslator::WriteShaderCode() {
         }
       }
       // Coverage output for alpha to mask.
-      if (color_targets_written & 0b1) {
+      if ((color_targets_written & 0b1) &&
+          !global_flag_force_early_depth_stencil) {
         ao_.OpDclOutput(dxbc::Dest::OMask());
       }
       // Depth output.

src/xenia/gpu/dxbc_shader_translator.h

@@ -656,6 +656,14 @@ class DxbcShaderTranslator : public ShaderTranslator {
                GetDxbcShaderModification().vertex.host_vertex_shader_type);
   }
 
+  bool IsForceEarlyDepthStencilGlobalFlagEnabled() const {
+    return is_pixel_shader() &&
+           GetDxbcShaderModification().pixel.depth_stencil_mode ==
+               Modification::DepthStencilMode::kEarlyHint &&
+           !edram_rov_used_ &&
+           current_shader().implicit_early_z_write_allowed();
+  }
+
   // Whether to use switch-case rather than if (pc >= label) for control flow.
   bool UseSwitchForControlFlow() const;
 

src/xenia/gpu/dxbc_shader_translator_om.cc

@@ -1979,7 +1979,8 @@ void DxbcShaderTranslator::CompletePixelShader_AlphaToMaskSample(
 
 void DxbcShaderTranslator::CompletePixelShader_AlphaToMask() {
   // Check if alpha to coverage can be done at all in this shader.
-  if (!current_shader().writes_color_target(0)) {
+  if (!current_shader().writes_color_target(0) ||
+      IsForceEarlyDepthStencilGlobalFlagEnabled()) {
     return;
   }
 
@@ -2987,7 +2988,8 @@ void DxbcShaderTranslator::CompletePixelShader() {
     return;
   }
 
-  if (current_shader().writes_color_target(0)) {
+  if (current_shader().writes_color_target(0) &&
+      !IsForceEarlyDepthStencilGlobalFlagEnabled()) {
     // Alpha test.
     // X - mask, then masked result (SGPR for loading, VGPR for masking).
     // Y - operation result (SGPR for mask operations, VGPR for alpha