diff --git a/src/xenia/cpu/frontend/testing/instr_vor.s b/src/xenia/cpu/frontend/testing/instr_vor.s
new file mode 100644
index 000000000..466b09d20
--- /dev/null
+++ b/src/xenia/cpu/frontend/testing/instr_vor.s
@@ -0,0 +1,8 @@
+test_vor_1:
+  #_ REGISTER_IN v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
+  #_ REGISTER_IN v4 [80081010, 808F0000, 00000000, 8FFFFFFF]
+  vor v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
+  #_ REGISTER_OUT v4 [80081010, 808F0000, 00000000, 8FFFFFFF]
+  #_ REGISTER_OUT v5 [FFFF1111, F0FFFFFF, FFFFFFFF, 8FFFFFFF]
diff --git a/src/xenia/cpu/frontend/testing/instr_vor128.s b/src/xenia/cpu/frontend/testing/instr_vor128.s
new file mode 100644
index 000000000..cb978eaec
--- /dev/null
+++ b/src/xenia/cpu/frontend/testing/instr_vor128.s
@@ -0,0 +1,8 @@
+test_vor128_1:
+  #_ REGISTER_IN v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
+  #_ REGISTER_IN v4 [80081010, 808F0000, 00000000, 8FFFFFFF]
+  vor128 v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
+  #_ REGISTER_OUT v4 [80081010, 808F0000, 00000000, 8FFFFFFF]
+  #_ REGISTER_OUT v5 [FFFF1111, F0FFFFFF, FFFFFFFF, 8FFFFFFF]
diff --git a/src/xenia/cpu/frontend/testing/instr_vxor.s b/src/xenia/cpu/frontend/testing/instr_vxor.s
new file mode 100644
index 000000000..51d9d5389
--- /dev/null
+++ b/src/xenia/cpu/frontend/testing/instr_vxor.s
@@ -0,0 +1,8 @@
+test_vxor_1:
+  #_ REGISTER_IN v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
+  #_ REGISTER_IN v4 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
+  vxor v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
+  #_ REGISTER_OUT v4 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
+  #_ REGISTER_OUT v5 [7FF71111, F0FFFFFF, 80000000, 8FFFFFFF]
diff --git a/src/xenia/cpu/frontend/testing/instr_vxor128.s b/src/xenia/cpu/frontend/testing/instr_vxor128.s
new file mode 100644
index 000000000..bfc808a80
--- /dev/null
+++ b/src/xenia/cpu/frontend/testing/instr_vxor128.s
@@ -0,0 +1,8 @@
+test_vxor128_1:
+  #_ REGISTER_IN v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
+  #_ REGISTER_IN v4 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
+  vxor128 v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
+  #_ REGISTER_OUT v4 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
+  #_ REGISTER_OUT v5 [7FF71111, F0FFFFFF, 80000000, 8FFFFFFF]