diff --git a/src/alloy/frontend/ppc/ppc_context.cc b/src/alloy/frontend/ppc/ppc_context.cc
index 9495cabf8..ad94c95f2 100644
--- a/src/alloy/frontend/ppc/ppc_context.cc
+++ b/src/alloy/frontend/ppc/ppc_context.cc
@@ -19,6 +19,10 @@ uint64_t ParseInt64(const char* value) {
   return std::strtoull(value, nullptr, 0);
 }
 
+double ParseFloat64(const char* value) {
+  return std::strtod(value, nullptr);
+}
+
 vec128_t ParseVec128(const char* value) {
   vec128_t v;
   char* p = const_cast<char*>(value);
@@ -37,6 +41,8 @@ void PPCContext::SetRegFromString(const char* name, const char* value) {
   int n;
   if (sscanf(name, "r%d", &n) == 1) {
     this->r[n] = ParseInt64(value);
+  } else if (sscanf(name, "f%d", &n) == 1) {
+    this->f[n] = ParseFloat64(value);
   } else if (sscanf(name, "v%d", &n) == 1) {
     this->v[n] = ParseVec128(value);
   } else {
@@ -54,6 +60,14 @@ bool PPCContext::CompareRegWithString(const char* name, const char* value,
       return false;
     }
     return true;
+  } else if (sscanf(name, "f%d", &n) == 1) {
+    double expected = ParseFloat64(value);
+    // TODO(benvanik): epsilon
+    if (this->f[n] != expected) {
+      snprintf(out_value, out_value_size, "%f", this->f[n]);
+      return false;
+    }
+    return true;
   } else if (sscanf(name, "v%d", &n) == 1) {
     vec128_t expected = ParseVec128(value);
     if (this->v[n] != expected) {
diff --git a/src/alloy/frontend/ppc/test/bin/instr_fabs.bin b/src/alloy/frontend/ppc/test/bin/instr_fabs.bin
new file mode 100644
index 000000000..c34adc217
Binary files /dev/null and b/src/alloy/frontend/ppc/test/bin/instr_fabs.bin differ
diff --git a/src/alloy/frontend/ppc/test/bin/instr_fabs.dis b/src/alloy/frontend/ppc/test/bin/instr_fabs.dis
new file mode 100644
index 000000000..b18e88a5c
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/bin/instr_fabs.dis
@@ -0,0 +1,17 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_fabs.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_fabs_1>:
+  100000:	fc 20 0a 10 	fabs    f1,f1
+  100004:	4e 80 00 20 	blr
+
+0000000000100008 <test_fabs_2>:
+  100008:	fc 20 0a 10 	fabs    f1,f1
+  10000c:	4e 80 00 20 	blr
+
+0000000000100010 <test_fabs_3>:
+  100010:	fc 20 0a 10 	fabs    f1,f1
+  100014:	4e 80 00 20 	blr
diff --git a/src/alloy/frontend/ppc/test/bin/instr_fabs.map b/src/alloy/frontend/ppc/test/bin/instr_fabs.map
new file mode 100644
index 000000000..dc13f6f64
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/bin/instr_fabs.map
@@ -0,0 +1,3 @@
+0000000000000000 t test_fabs_1
+0000000000000008 t test_fabs_2
+0000000000000010 t test_fabs_3
diff --git a/src/alloy/frontend/ppc/test/instr_fabs.s b/src/alloy/frontend/ppc/test/instr_fabs.s
new file mode 100644
index 000000000..5d3c35d90
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/instr_fabs.s
@@ -0,0 +1,17 @@
+test_fabs_1:
+  #_ REGISTER_IN f1 1.0
+  fabs f1, f1
+  blr
+  #_ REGISTER_OUT f1 1.0
+
+test_fabs_2:
+  #_ REGISTER_IN f1 -1.0
+  fabs f1, f1
+  blr
+  #_ REGISTER_OUT f1 1.0
+
+test_fabs_3:
+  #_ REGISTER_IN f1 -1234.0
+  fabs f1, f1
+  blr
+  #_ REGISTER_OUT f1 1234.0