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Switching tracing order to prevent skipping traces of branch instructions.

This commit is contained in:
Ben Vanik 2013-09-06 23:21:08 -07:00
parent 1a3fed942d
commit d5b8a2091a
3 changed files with 25 additions and 25 deletions
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44
src/xenia/cpu/global_exports.cc
View File

@ -117,28 +117,6 @@ void _cdecl XeTraceInstruction(
buffer[0] = 0; buffer[0] = 0;
int offset = 0; int offset = 0;
ppc::InstrData i;
i.address = (uint32_t)cia;
i.code = (uint32_t)data;
i.type = ppc::GetInstrType(i.code);
if (i.type && i.type->disassemble) {
ppc::InstrDisasm d;
i.type->disassemble(i, d);
std::string disasm;
d.Dump(disasm);
offset += xesnprintfa(buffer + offset, XECOUNT(buffer) - offset,
"%.8X %.8X %s %s",
i.address, i.code,
i.type && i.type->emit ? " " : "X",
disasm.c_str());
} else {
offset += xesnprintfa(buffer + offset, XECOUNT(buffer) - offset,
"%.8X %.8X %s %s",
i.address, i.code,
i.type && i.type->emit ? " " : "X",
i.type ? i.type->name : "<unknown>");
}
if (FLAGS_trace_registers) { if (FLAGS_trace_registers) {
offset += xesnprintfa(buffer + offset, XECOUNT(buffer) - offset, offset += xesnprintfa(buffer + offset, XECOUNT(buffer) - offset,
"\n" "\n"
@ -162,6 +140,28 @@ void _cdecl XeTraceInstruction(
state->r[28], state->r[29], state->r[30], state->r[31]); state->r[28], state->r[29], state->r[30], state->r[31]);
} }
ppc::InstrData i;
i.address = (uint32_t)cia;
i.code = (uint32_t)data;
i.type = ppc::GetInstrType(i.code);
if (i.type && i.type->disassemble) {
ppc::InstrDisasm d;
i.type->disassemble(i, d);
std::string disasm;
d.Dump(disasm);
offset += xesnprintfa(buffer + offset, XECOUNT(buffer) - offset,
"%.8X %.8X %s %s",
i.address, i.code,
i.type && i.type->emit ? " " : "X",
disasm.c_str());
} else {
offset += xesnprintfa(buffer + offset, XECOUNT(buffer) - offset,
"%.8X %.8X %s %s",
i.address, i.code,
i.type && i.type->emit ? " " : "X",
i.type ? i.type->name : "<unknown>");
}
uint32_t thread_id = state->thread_state->thread_id(); uint32_t thread_id = state->thread_state->thread_id();
xe_log_line("", thread_id, "XeTraceInstruction", 't', buffer); xe_log_line("", thread_id, "XeTraceInstruction", 't', buffer);

4
src/xenia/cpu/x64/x64_emitter.cc
View File

@ -624,6 +624,7 @@ void X64Emitter::GenerateBasicBlock(FunctionBlock* block) {
typedef int (*InstrEmitter)(X64Emitter& g, X86Compiler& c, InstrData& i); typedef int (*InstrEmitter)(X64Emitter& g, X86Compiler& c, InstrData& i);
InstrEmitter emit = (InstrEmitter)i.type->emit; InstrEmitter emit = (InstrEmitter)i.type->emit;
TraceInstruction(i);
if (!i.type->emit || emit(*this, compiler_, i)) { if (!i.type->emit || emit(*this, compiler_, i)) {
// This printf is handy for sort/uniquify to find instructions. // This printf is handy for sort/uniquify to find instructions.
printf("unimplinstr %s\n", i.type->name); printf("unimplinstr %s\n", i.type->name);
@ -633,9 +634,6 @@ void X64Emitter::GenerateBasicBlock(FunctionBlock* block) {
TraceInvalidInstruction(i); TraceInvalidInstruction(i);
} }
TraceInstruction(i);
}
// If we fall through, create the branch. // If we fall through, create the branch.
if (block->outgoing_type == FunctionBlock::kTargetNone) { if (block->outgoing_type == FunctionBlock::kTargetNone) {
// BasicBlock* next_bb = GetNextBasicBlock(); // BasicBlock* next_bb = GetNextBasicBlock();

2
src/xenia/kernel/modules/xboxkrnl/xboxkrnl_memory.cc
View File

@ -235,6 +235,8 @@ uint32_t xeMmAllocatePhysicalMemoryEx(
return 0; return 0;
} }
// TODO(benvanik): address should be in 0xA0000000+ range.
return base_address; return base_address;
} }