From cfaa72cae698b043b37fa51f34c60add4eaeef18 Mon Sep 17 00:00:00 2001 From: gibbed Date: Thu, 14 May 2015 15:56:25 -0500 Subject: [PATCH] Tests for extsb, extsh, extsw. --- src/xenia/cpu/frontend/test/instr_extsb.s | 129 +++++++++++++++++++++ src/xenia/cpu/frontend/test/instr_extsh.s | 133 +++++++++++++++++++++ src/xenia/cpu/frontend/test/instr_extsw.s | 135 ++++++++++++++++++++++ 3 files changed, 397 insertions(+) create mode 100644 src/xenia/cpu/frontend/test/instr_extsb.s create mode 100644 src/xenia/cpu/frontend/test/instr_extsh.s create mode 100644 src/xenia/cpu/frontend/test/instr_extsw.s diff --git a/src/xenia/cpu/frontend/test/instr_extsb.s b/src/xenia/cpu/frontend/test/instr_extsb.s new file mode 100644 index 000000000..c377c4a88 --- /dev/null +++ b/src/xenia/cpu/frontend/test/instr_extsb.s @@ -0,0 +1,129 @@ +test_extsb_1: + #_ REGISTER_IN r4 0x0F + extsb r3, r4 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + +test_extsb_1_constant: + li r4, 0x0F + extsb r3, r4 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + +test_extsb_2: + #_ REGISTER_IN r4 0x7F + extsb r3, r4 + blr + #_ REGISTER_OUT r3 0x7F + #_ REGISTER_OUT r4 0x7F + +test_extsb_2_constant: + li r4, 0x7F + extsb r3, r4 + blr + #_ REGISTER_OUT r3 0x7F + #_ REGISTER_OUT r4 0x7F + +test_extsb_3: + #_ REGISTER_IN r4 0x80 + extsb r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF80 + #_ REGISTER_OUT r4 0x80 + +test_extsb_3_constant: + li r4, 0x80 + extsb r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF80 + #_ REGISTER_OUT r4 0x80 + +test_extsb_4: + #_ REGISTER_IN r4 0xFFFFFFFFFFFFF080 + extsb r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF80 + #_ REGISTER_OUT r4 0xFFFFFFFFFFFFF080 + +test_extsb_4_constant: + li r4, 0xF7F + not r4, r4 + extsb r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF80 + #_ REGISTER_OUT r4 0xFFFFFFFFFFFFF080 + +test_extsb_cr_1: + #_ REGISTER_IN r4 0x0F + extsb. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + #_ REGISTER_OUT r12 0x40000000 + +test_extsb_cr_1_constant: + li r4, 0x0F + extsb. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + #_ REGISTER_OUT r12 0x40000000 + +test_extsb_cr_2: + #_ REGISTER_IN r4 0x7F + extsb. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x7F + #_ REGISTER_OUT r4 0x7F + #_ REGISTER_OUT r12 0x40000000 + +test_extsb_cr_2_constant: + li r4, 0x7F + extsb. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x7F + #_ REGISTER_OUT r4 0x7F + #_ REGISTER_OUT r12 0x40000000 + +test_extsb_cr_3: + #_ REGISTER_IN r4 0x80 + extsb. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF80 + #_ REGISTER_OUT r4 0x80 + #_ REGISTER_OUT r12 0x80000000 + +test_extsb_cr_3_constant: + li r4, 0x80 + extsb. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF80 + #_ REGISTER_OUT r4 0x80 + #_ REGISTER_OUT r12 0x80000000 + +test_extsb_cr_4: + #_ REGISTER_IN r4 0xFFFFFFFFFFFFF080 + extsb. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF80 + #_ REGISTER_OUT r4 0xFFFFFFFFFFFFF080 + #_ REGISTER_OUT r12 0x80000000 + +test_extsb_cr_4_constant: + li r4, 0xF7F + not r4, r4 + extsb. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFF80 + #_ REGISTER_OUT r4 0xFFFFFFFFFFFFF080 + #_ REGISTER_OUT r12 0x80000000 diff --git a/src/xenia/cpu/frontend/test/instr_extsh.s b/src/xenia/cpu/frontend/test/instr_extsh.s new file mode 100644 index 000000000..956c372ec --- /dev/null +++ b/src/xenia/cpu/frontend/test/instr_extsh.s @@ -0,0 +1,133 @@ +test_extsh_1: + #_ REGISTER_IN r4 0x0F + extsh r3, r4 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + +test_extsh_1_constant: + li r4, 0x0F + extsh r3, r4 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + +test_extsh_2: + #_ REGISTER_IN r4 0x7FFF + extsh r3, r4 + blr + #_ REGISTER_OUT r3 0x7FFF + #_ REGISTER_OUT r4 0x7FFF + +test_extsh_2_constant: + li r4, 0x7FFF + extsh r3, r4 + blr + #_ REGISTER_OUT r3 0x7FFF + #_ REGISTER_OUT r4 0x7FFF + +test_extsh_3: + #_ REGISTER_IN r4 0x8000 + extsh r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFF8000 + #_ REGISTER_OUT r4 0x8000 + +test_extsh_3_constant: + li r4, 0x80 + sldi r4, r4, 8 + extsh r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFF8000 + #_ REGISTER_OUT r4 0x8000 + +test_extsh_4: + #_ REGISTER_IN r4 0xFFFFFFFFFFF08000 + extsh r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFF8000 + #_ REGISTER_OUT r4 0xFFFFFFFFFFF08000 + +test_extsh_4_constant: + li r4, 0xF7F + not r4, r4 + sldi r4, r4, 8 + extsh r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFF8000 + #_ REGISTER_OUT r4 0xFFFFFFFFFFF08000 + +test_extsh_cr_1: + #_ REGISTER_IN r4 0x0F + extsh. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + #_ REGISTER_OUT r12 0x40000000 + +test_extsh_cr_1_constant: + li r4, 0x0F + extsh. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + #_ REGISTER_OUT r12 0x40000000 + +test_extsh_cr_2: + #_ REGISTER_IN r4 0x7FFF + extsh. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x7FFF + #_ REGISTER_OUT r4 0x7FFF + #_ REGISTER_OUT r12 0x40000000 + +test_extsh_cr_2_constant: + li r4, 0x7FFF + extsh. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x7FFF + #_ REGISTER_OUT r4 0x7FFF + #_ REGISTER_OUT r12 0x40000000 + +test_extsh_cr_3: + #_ REGISTER_IN r4 0x8000 + extsh. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFF8000 + #_ REGISTER_OUT r4 0x8000 + #_ REGISTER_OUT r12 0x80000000 + +test_extsh_cr_3_constant: + li r4, 0x80 + sldi r4, r4, 8 + extsh. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFF8000 + #_ REGISTER_OUT r4 0x8000 + #_ REGISTER_OUT r12 0x80000000 + +test_extsh_cr_4: + #_ REGISTER_IN r4 0xFFFFFFFFFFF08000 + extsh. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFF8000 + #_ REGISTER_OUT r4 0xFFFFFFFFFFF08000 + #_ REGISTER_OUT r12 0x80000000 + +test_extsh_cr_4_constant: + li r4, 0xF7F + not r4, r4 + sldi r4, r4, 8 + extsh. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFFFFFF8000 + #_ REGISTER_OUT r4 0xFFFFFFFFFFF08000 + #_ REGISTER_OUT r12 0x80000000 diff --git a/src/xenia/cpu/frontend/test/instr_extsw.s b/src/xenia/cpu/frontend/test/instr_extsw.s new file mode 100644 index 000000000..c7df978da --- /dev/null +++ b/src/xenia/cpu/frontend/test/instr_extsw.s @@ -0,0 +1,135 @@ +test_extsw_1: + #_ REGISTER_IN r4 0x0F + extsw r3, r4 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + +test_extsw_1_constant: + li r4, 0x0F + extsw r3, r4 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + +test_extsw_2: + #_ REGISTER_IN r4 0x7FFFFFFF + extsw r3, r4 + blr + #_ REGISTER_OUT r3 0x7FFFFFFF + #_ REGISTER_OUT r4 0x7FFFFFFF + +test_extsw_2_constant: + lis r4, 0x7FFF + ori r4, r4, 0xFFFF + extsw r3, r4 + blr + #_ REGISTER_OUT r3 0x7FFFFFFF + #_ REGISTER_OUT r4 0x7FFFFFFF + +test_extsw_3: + #_ REGISTER_IN r4 0x80000000 + extsw r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFF80000000 + #_ REGISTER_OUT r4 0x80000000 + +test_extsw_3_constant: + li r4, 0x80 + sldi r4, r4, 24 + extsw r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFF80000000 + #_ REGISTER_OUT r4 0x80000000 + +test_extsw_4: + #_ REGISTER_IN r4 0xFFFFFFF080000000 + extsw r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFF80000000 + #_ REGISTER_OUT r4 0xFFFFFFF080000000 + +test_extsw_4_constant: + li r4, 0xF7F + not r4, r4 + sldi r4, r4, 24 + extsw r3, r4 + blr + #_ REGISTER_OUT r3 0xFFFFFFFF80000000 + #_ REGISTER_OUT r4 0xFFFFFFF080000000 + +test_extsw_cr_1: + #_ REGISTER_IN r4 0x0F + extsw. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + #_ REGISTER_OUT r12 0x40000000 + +test_extsw_cr_1_constant: + li r4, 0x0F + extsw. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x0F + #_ REGISTER_OUT r4 0x0F + #_ REGISTER_OUT r12 0x40000000 + +test_extsw_cr_2: + #_ REGISTER_IN r4 0x7FFFFFFF + extsw. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x7FFFFFFF + #_ REGISTER_OUT r4 0x7FFFFFFF + #_ REGISTER_OUT r12 0x40000000 + +test_extsw_cr_2_constant: + lis r4, 0x7FFF + ori r4, r4, 0xFFFF + extsw. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0x7FFFFFFF + #_ REGISTER_OUT r4 0x7FFFFFFF + #_ REGISTER_OUT r12 0x40000000 + +test_extsw_cr_3: + #_ REGISTER_IN r4 0x80000000 + extsw. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFF80000000 + #_ REGISTER_OUT r4 0x80000000 + #_ REGISTER_OUT r12 0x80000000 + +test_extsw_cr_3_constant: + li r4, 0x80 + sldi r4, r4, 24 + extsw. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFF80000000 + #_ REGISTER_OUT r4 0x80000000 + #_ REGISTER_OUT r12 0x80000000 + +test_extsw_cr_4: + #_ REGISTER_IN r4 0xFFFFFFF080000000 + extsw. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFF80000000 + #_ REGISTER_OUT r4 0xFFFFFFF080000000 + #_ REGISTER_OUT r12 0x80000000 + +test_extsw_cr_4_constant: + li r4, 0xF7F + not r4, r4 + sldi r4, r4, 24 + extsw. r3, r4 + mfcr r12 + blr + #_ REGISTER_OUT r3 0xFFFFFFFF80000000 + #_ REGISTER_OUT r4 0xFFFFFFF080000000 + #_ REGISTER_OUT r12 0x80000000