diff --git a/libxenia.vcxproj b/libxenia.vcxproj index 16f14fcc8..7cd83fb8f 100644 --- a/libxenia.vcxproj +++ b/libxenia.vcxproj @@ -414,92 +414,6 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/libxenia.vcxproj.filters b/libxenia.vcxproj.filters index 9485e5527..aa210d879 100644 --- a/libxenia.vcxproj.filters +++ b/libxenia.vcxproj.filters @@ -1337,264 +1337,6 @@ - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - - - Resource Files - src\xenia\cpu\backend\x64 diff --git a/src/xenia/cpu/frontend/test/bin/instr_cntlzd.bin b/src/xenia/cpu/frontend/test/bin/instr_cntlzd.bin index bfe2006ab..95c1cb8ee 100644 Binary files a/src/xenia/cpu/frontend/test/bin/instr_cntlzd.bin and b/src/xenia/cpu/frontend/test/bin/instr_cntlzd.bin differ diff --git a/src/xenia/cpu/frontend/test/bin/instr_cntlzd.dis b/src/xenia/cpu/frontend/test/bin/instr_cntlzd.dis index 3901eb8ab..b388e0d2c 100644 --- a/src/xenia/cpu/frontend/test/bin/instr_cntlzd.dis +++ b/src/xenia/cpu/frontend/test/bin/instr_cntlzd.dis @@ -8,14 +8,37 @@ Disassembly of section .text: 100000: 7c a6 00 74 cntlzd r6,r5 100004: 4e 80 00 20 blr -0000000000100008 : - 100008: 7c a6 00 74 cntlzd r6,r5 - 10000c: 4e 80 00 20 blr +0000000000100008 : + 100008: 38 a0 00 00 li r5,0 + 10000c: 7c a6 00 74 cntlzd r6,r5 + 100010: 4e 80 00 20 blr -0000000000100010 : - 100010: 7c a6 00 74 cntlzd r6,r5 - 100014: 4e 80 00 20 blr +0000000000100014 : + 100014: 7c a6 00 74 cntlzd r6,r5 + 100018: 4e 80 00 20 blr -0000000000100018 : - 100018: 7c a6 00 74 cntlzd r6,r5 - 10001c: 4e 80 00 20 blr +000000000010001c : + 10001c: 38 a0 00 01 li r5,1 + 100020: 7c a6 00 74 cntlzd r6,r5 + 100024: 4e 80 00 20 blr + +0000000000100028 : + 100028: 7c a6 00 74 cntlzd r6,r5 + 10002c: 4e 80 00 20 blr + +0000000000100030 : + 100030: 38 a0 00 00 li r5,0 + 100034: 7c a5 28 f8 not r5,r5 + 100038: 7c a6 00 74 cntlzd r6,r5 + 10003c: 4e 80 00 20 blr + +0000000000100040 : + 100040: 7c a6 00 74 cntlzd r6,r5 + 100044: 4e 80 00 20 blr + +0000000000100048 : + 100048: 38 a0 00 00 li r5,0 + 10004c: 7c a5 28 f8 not r5,r5 + 100050: 78 a5 f8 42 rldicl r5,r5,63,1 + 100054: 7c a6 00 74 cntlzd r6,r5 + 100058: 4e 80 00 20 blr diff --git a/src/xenia/cpu/frontend/test/bin/instr_cntlzd.map b/src/xenia/cpu/frontend/test/bin/instr_cntlzd.map index 9827966b4..68ddb40bd 100644 --- a/src/xenia/cpu/frontend/test/bin/instr_cntlzd.map +++ b/src/xenia/cpu/frontend/test/bin/instr_cntlzd.map @@ -1,4 +1,8 @@ 0000000000000000 t test_cntlzd_1 -0000000000000008 t test_cntlzd_2 -0000000000000010 t test_cntlzd_3 -0000000000000018 t test_cntlzd_4 +0000000000000008 t test_cntlzd_1_constant +0000000000000014 t test_cntlzd_2 +000000000000001c t test_cntlzd_2_constant +0000000000000028 t test_cntlzd_3 +0000000000000030 t test_cntlzd_3_constant +0000000000000040 t test_cntlzd_4 +0000000000000048 t test_cntlzd_4_constant diff --git a/src/xenia/cpu/frontend/test/bin/instr_cntlzw.bin b/src/xenia/cpu/frontend/test/bin/instr_cntlzw.bin index dbbcd2460..53b8558e2 100644 Binary files a/src/xenia/cpu/frontend/test/bin/instr_cntlzw.bin and b/src/xenia/cpu/frontend/test/bin/instr_cntlzw.bin differ diff --git a/src/xenia/cpu/frontend/test/bin/instr_cntlzw.dis b/src/xenia/cpu/frontend/test/bin/instr_cntlzw.dis index aed40e2e4..923f5b2de 100644 --- a/src/xenia/cpu/frontend/test/bin/instr_cntlzw.dis +++ b/src/xenia/cpu/frontend/test/bin/instr_cntlzw.dis @@ -8,14 +8,38 @@ Disassembly of section .text: 100000: 7c a6 00 34 cntlzw r6,r5 100004: 4e 80 00 20 blr -0000000000100008 : - 100008: 7c a6 00 34 cntlzw r6,r5 - 10000c: 4e 80 00 20 blr +0000000000100008 : + 100008: 38 a0 00 00 li r5,0 + 10000c: 7c a6 00 34 cntlzw r6,r5 + 100010: 4e 80 00 20 blr -0000000000100010 : - 100010: 7c a6 00 34 cntlzw r6,r5 - 100014: 4e 80 00 20 blr +0000000000100014 : + 100014: 7c a6 00 34 cntlzw r6,r5 + 100018: 4e 80 00 20 blr -0000000000100018 : - 100018: 7c a6 00 34 cntlzw r6,r5 - 10001c: 4e 80 00 20 blr +000000000010001c : + 10001c: 38 a0 00 01 li r5,1 + 100020: 7c a6 00 34 cntlzw r6,r5 + 100024: 4e 80 00 20 blr + +0000000000100028 : + 100028: 7c a6 00 34 cntlzw r6,r5 + 10002c: 4e 80 00 20 blr + +0000000000100030 : + 100030: 38 a0 00 00 li r5,0 + 100034: 7c a5 28 f8 not r5,r5 + 100038: 54 a5 00 3e rotlwi r5,r5,0 + 10003c: 7c a6 00 34 cntlzw r6,r5 + 100040: 4e 80 00 20 blr + +0000000000100044 : + 100044: 7c a6 00 34 cntlzw r6,r5 + 100048: 4e 80 00 20 blr + +000000000010004c : + 10004c: 38 a0 00 00 li r5,0 + 100050: 7c a5 28 f8 not r5,r5 + 100054: 54 a5 f8 7e rlwinm r5,r5,31,1,31 + 100058: 7c a6 00 34 cntlzw r6,r5 + 10005c: 4e 80 00 20 blr diff --git a/src/xenia/cpu/frontend/test/bin/instr_cntlzw.map b/src/xenia/cpu/frontend/test/bin/instr_cntlzw.map index f39c3907b..d4d7b9048 100644 --- a/src/xenia/cpu/frontend/test/bin/instr_cntlzw.map +++ b/src/xenia/cpu/frontend/test/bin/instr_cntlzw.map @@ -1,4 +1,8 @@ 0000000000000000 t test_cntlzw_1 -0000000000000008 t test_cntlzw_2 -0000000000000010 t test_cntlzw_3 -0000000000000018 t test_cntlzw_4 +0000000000000008 t test_cntlzw_1_constant +0000000000000014 t test_cntlzw_2 +000000000000001c t test_cntlzw_2_constant +0000000000000028 t test_cntlzw_3 +0000000000000030 t test_cntlzw_3_constant +0000000000000044 t test_cntlzw_4 +000000000000004c t test_cntlzw_4_constant diff --git a/src/xenia/cpu/hir/value.cc b/src/xenia/cpu/hir/value.cc index 907e685cc..0e37cfd03 100644 --- a/src/xenia/cpu/hir/value.cc +++ b/src/xenia/cpu/hir/value.cc @@ -552,7 +552,7 @@ void Value::Shr(Value* other) { constant.i32 = (uint32_t)constant.i32 >> other->constant.i8; break; case INT64_TYPE: - constant.i64 = (uint16_t)constant.i64 >> other->constant.i8; + constant.i64 = (uint64_t)constant.i64 >> other->constant.i8; break; default: assert_unhandled_case(type);