[CPU] Added constant propagation pass for: OPCODE_AND_NOT
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@ -2697,12 +2697,7 @@ EMITTER_OPCODE_TABLE(OPCODE_AND, AND_I8, AND_I16, AND_I32, AND_I64, AND_V128);
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template <typename SEQ, typename REG, typename ARGS>
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template <typename SEQ, typename REG, typename ARGS>
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void EmitAndNotXX(X64Emitter& e, const ARGS& i) {
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void EmitAndNotXX(X64Emitter& e, const ARGS& i) {
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if (i.src1.is_constant) {
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if (i.src1.is_constant) {
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if (i.src2.is_constant) {
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// Both constants.
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e.mov(i.dest, i.src1.constant() & ~i.src2.constant());
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} else {
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// src1 constant.
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// src1 constant.
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// `and` instruction only supports up to 32-bit immediate constants
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// `and` instruction only supports up to 32-bit immediate constants
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// 64-bit constants will need a temp register
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// 64-bit constants will need a temp register
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if (i.dest.reg().getBit() == 64) {
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if (i.dest.reg().getBit() == 64) {
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@ -2725,7 +2720,6 @@ void EmitAndNotXX(X64Emitter& e, const ARGS& i) {
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e.not_(i.dest);
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e.not_(i.dest);
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e.and_(i.dest, uint32_t(i.src1.constant()));
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e.and_(i.dest, uint32_t(i.src1.constant()));
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}
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}
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}
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} else if (i.src2.is_constant) {
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} else if (i.src2.is_constant) {
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// src2 constant.
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// src2 constant.
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if (i.dest == i.src1) {
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if (i.dest == i.src1) {
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@ -648,6 +648,15 @@ bool ConstantPropagationPass::Run(HIRBuilder* builder, bool& result) {
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result = true;
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result = true;
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}
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}
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break;
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break;
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case OPCODE_AND_NOT:
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if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) {
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v->set_from(i->src2.value);
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v->Not();
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v->And(i->src1.value);
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i->Remove();
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result = true;
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}
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break;
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case OPCODE_OR:
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case OPCODE_OR:
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if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) {
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if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) {
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v->set_from(i->src1.value);
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v->set_from(i->src1.value);
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