From bea887070027f589de7384d2b6573661c67538d5 Mon Sep 17 00:00:00 2001 From: Ben Vanik Date: Sat, 28 Nov 2015 16:01:51 -0800 Subject: [PATCH] Shuffling old-style ucode.h under gl4. --- src/xenia/gpu/command_processor.cc | 2 +- src/xenia/gpu/command_processor.h | 4 +- src/xenia/gpu/gl4/draw_batcher.h | 2 +- src/xenia/gpu/gl4/gl4_command_processor.h | 14 +- src/xenia/gpu/gl4/gl4_shader.cc | 4 +- src/xenia/gpu/gl4/gl4_shader_translator.cc | 4 +- src/xenia/gpu/gl4/texture_cache.cc | 40 +- src/xenia/gpu/gl4/ucode.h | 549 ++++++++++++++++++ src/xenia/gpu/{ => gl4}/ucode_disassembler.cc | 7 +- src/xenia/gpu/{ => gl4}/ucode_disassembler.h | 9 +- src/xenia/gpu/sampler_info.cc | 16 +- src/xenia/gpu/sampler_info.h | 18 +- src/xenia/gpu/shader.cc | 6 +- src/xenia/gpu/shader.h | 18 +- src/xenia/gpu/texture_info.cc | 1 - src/xenia/gpu/texture_info.h | 38 +- src/xenia/gpu/trace_viewer.h | 12 +- src/xenia/gpu/xenos.h | 98 +++- src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc | 6 +- 19 files changed, 723 insertions(+), 125 deletions(-) create mode 100644 src/xenia/gpu/gl4/ucode.h rename src/xenia/gpu/{ => gl4}/ucode_disassembler.cc (99%) rename src/xenia/gpu/{ => gl4}/ucode_disassembler.h (81%) diff --git a/src/xenia/gpu/command_processor.cc b/src/xenia/gpu/command_processor.cc index ced5a53db..4d0ee3378 100644 --- a/src/xenia/gpu/command_processor.cc +++ b/src/xenia/gpu/command_processor.cc @@ -941,7 +941,7 @@ bool CommandProcessor::ExecutePacketType3_EVENT_WRITE_EXT( 0, // min z 1, // max z }; - assert_true(endianness == xenos::Endian::k8in16); + assert_true(endianness == Endian::k8in16); xe::copy_and_swap_16_aligned( reinterpret_cast(memory_->TranslatePhysical(address)), extents, xe::countof(extents)); diff --git a/src/xenia/gpu/command_processor.h b/src/xenia/gpu/command_processor.h index 55e0a4d12..0d20bdecd 100644 --- a/src/xenia/gpu/command_processor.h +++ b/src/xenia/gpu/command_processor.h @@ -95,8 +95,8 @@ class CommandProcessor { class RingbufferReader; struct IndexBufferInfo { - xenos::IndexFormat format = xenos::IndexFormat::kInt16; - xenos::Endian endianness = xenos::Endian::kUnspecified; + IndexFormat format = IndexFormat::kInt16; + Endian endianness = Endian::kUnspecified; uint32_t count = 0; uint32_t guest_base = 0; size_t length = 0; diff --git a/src/xenia/gpu/gl4/draw_batcher.h b/src/xenia/gpu/gl4/draw_batcher.h index 87657c2fb..5c83d73e1 100644 --- a/src/xenia/gpu/gl4/draw_batcher.h +++ b/src/xenia/gpu/gl4/draw_batcher.h @@ -90,7 +90,7 @@ class DrawBatcher { bool BeginDrawArrays(PrimitiveType prim_type, uint32_t index_count); bool BeginDrawElements(PrimitiveType prim_type, uint32_t index_count, - xenos::IndexFormat index_format); + IndexFormat index_format); void DiscardDraw(); bool CommitDraw(); bool Flush(FlushMode mode); diff --git a/src/xenia/gpu/gl4/gl4_command_processor.h b/src/xenia/gpu/gl4/gl4_command_processor.h index 14b031b60..699bab8ff 100644 --- a/src/xenia/gpu/gl4/gl4_command_processor.h +++ b/src/xenia/gpu/gl4/gl4_command_processor.h @@ -50,12 +50,10 @@ class GL4CommandProcessor : public CommandProcessor { // HACK: for debugging; would be good to have this in a base type. TextureCache* texture_cache() { return &texture_cache_; } - GLuint GetColorRenderTarget(uint32_t pitch, xenos::MsaaSamples samples, - uint32_t base, - xenos::ColorRenderTargetFormat format); - GLuint GetDepthRenderTarget(uint32_t pitch, xenos::MsaaSamples samples, - uint32_t base, - xenos::DepthRenderTargetFormat format); + GLuint GetColorRenderTarget(uint32_t pitch, MsaaSamples samples, + uint32_t base, ColorRenderTargetFormat format); + GLuint GetDepthRenderTarget(uint32_t pitch, MsaaSamples samples, + uint32_t base, DepthRenderTargetFormat format); private: enum class UpdateStatus { @@ -73,14 +71,14 @@ class GL4CommandProcessor : public CommandProcessor { uint32_t base; uint32_t width; uint32_t height; - xenos::ColorRenderTargetFormat format; + ColorRenderTargetFormat format; GLuint texture; }; struct CachedDepthRenderTarget { uint32_t base; uint32_t width; uint32_t height; - xenos::DepthRenderTargetFormat format; + DepthRenderTargetFormat format; GLuint texture; }; struct CachedPipeline { diff --git a/src/xenia/gpu/gl4/gl4_shader.cc b/src/xenia/gpu/gl4/gl4_shader.cc index 16875c1ba..66230c7e9 100644 --- a/src/xenia/gpu/gl4/gl4_shader.cc +++ b/src/xenia/gpu/gl4/gl4_shader.cc @@ -20,8 +20,6 @@ namespace xe { namespace gpu { namespace gl4 { -using xe::gpu::xenos::VertexFormat; - GL4Shader::GL4Shader(ShaderType shader_type, uint64_t data_hash, const uint32_t* dword_ptr, uint32_t dword_count) : Shader(shader_type, data_hash, dword_ptr, dword_count), @@ -133,7 +131,7 @@ bool GL4Shader::PrepareVertexArrayObject() { for (uint32_t i = 0; i < desc.element_count; ++i, ++el_index) { const auto& el = desc.elements[i]; - auto comp_count = GetVertexFormatComponentCount(el.format); + auto comp_count = xenos::GetVertexFormatComponentCount(el.format); GLenum comp_type; switch (el.format) { case VertexFormat::k_8_8_8_8: diff --git a/src/xenia/gpu/gl4/gl4_shader_translator.cc b/src/xenia/gpu/gl4/gl4_shader_translator.cc index c72a738f4..9920c1681 100644 --- a/src/xenia/gpu/gl4/gl4_shader_translator.cc +++ b/src/xenia/gpu/gl4/gl4_shader_translator.cc @@ -20,9 +20,7 @@ namespace xe { namespace gpu { namespace gl4 { -using namespace xe::gpu::ucode; - -using xe::gpu::xenos::VertexFormat; +using namespace xe::gpu::gl4::ucode; #define Append(...) output_.AppendFormat(__VA_ARGS__) diff --git a/src/xenia/gpu/gl4/texture_cache.cc b/src/xenia/gpu/gl4/texture_cache.cc index 26297110c..d54ae3318 100644 --- a/src/xenia/gpu/gl4/texture_cache.cc +++ b/src/xenia/gpu/gl4/texture_cache.cc @@ -23,8 +23,6 @@ namespace xe { namespace gpu { namespace gl4 { -using xe::gpu::xenos::Endian; - struct TextureConfig { TextureFormat texture_format; GLenum internal_format; @@ -296,25 +294,25 @@ TextureCache::SamplerEntry* TextureCache::LookupOrInsertSampler( GL_MIRROR_CLAMP_TO_BORDER_EXT, // }; glSamplerParameteri(entry->handle, GL_TEXTURE_WRAP_S, - wrap_map[sampler_info.clamp_u]); + wrap_map[static_cast(sampler_info.clamp_u)]); glSamplerParameteri(entry->handle, GL_TEXTURE_WRAP_T, - wrap_map[sampler_info.clamp_v]); + wrap_map[static_cast(sampler_info.clamp_v)]); glSamplerParameteri(entry->handle, GL_TEXTURE_WRAP_R, - wrap_map[sampler_info.clamp_w]); + wrap_map[static_cast(sampler_info.clamp_w)]); // Texture level filtering. GLenum min_filter; switch (sampler_info.min_filter) { - case ucode::TEX_FILTER_POINT: + case TextureFilter::kPoint: switch (sampler_info.mip_filter) { - case ucode::TEX_FILTER_BASEMAP: + case TextureFilter::kBaseMap: min_filter = GL_NEAREST; break; - case ucode::TEX_FILTER_POINT: + case TextureFilter::kPoint: // min_filter = GL_NEAREST_MIPMAP_NEAREST; min_filter = GL_NEAREST; break; - case ucode::TEX_FILTER_LINEAR: + case TextureFilter::kLinear: // min_filter = GL_NEAREST_MIPMAP_LINEAR; min_filter = GL_NEAREST; break; @@ -323,16 +321,16 @@ TextureCache::SamplerEntry* TextureCache::LookupOrInsertSampler( return nullptr; } break; - case ucode::TEX_FILTER_LINEAR: + case TextureFilter::kLinear: switch (sampler_info.mip_filter) { - case ucode::TEX_FILTER_BASEMAP: + case TextureFilter::kBaseMap: min_filter = GL_LINEAR; break; - case ucode::TEX_FILTER_POINT: + case TextureFilter::kPoint: // min_filter = GL_LINEAR_MIPMAP_NEAREST; min_filter = GL_LINEAR; break; - case ucode::TEX_FILTER_LINEAR: + case TextureFilter::kLinear: // min_filter = GL_LINEAR_MIPMAP_LINEAR; min_filter = GL_LINEAR; break; @@ -347,10 +345,10 @@ TextureCache::SamplerEntry* TextureCache::LookupOrInsertSampler( } GLenum mag_filter; switch (sampler_info.mag_filter) { - case ucode::TEX_FILTER_POINT: + case TextureFilter::kPoint: mag_filter = GL_NEAREST; break; - case ucode::TEX_FILTER_LINEAR: + case TextureFilter::kLinear: mag_filter = GL_LINEAR; break; default: @@ -362,22 +360,22 @@ TextureCache::SamplerEntry* TextureCache::LookupOrInsertSampler( GLfloat aniso; switch (sampler_info.aniso_filter) { - case ucode::ANISO_FILTER_DISABLED: + case AnisoFilter::kDisabled: aniso = 0.0f; break; - case ucode::ANISO_FILTER_MAX_1_1: + case AnisoFilter::kMax_1_1: aniso = 1.0f; break; - case ucode::ANISO_FILTER_MAX_2_1: + case AnisoFilter::kMax_2_1: aniso = 2.0f; break; - case ucode::ANISO_FILTER_MAX_4_1: + case AnisoFilter::kMax_4_1: aniso = 4.0f; break; - case ucode::ANISO_FILTER_MAX_8_1: + case AnisoFilter::kMax_8_1: aniso = 8.0f; break; - case ucode::ANISO_FILTER_MAX_16_1: + case AnisoFilter::kMax_16_1: aniso = 16.0f; break; default: diff --git a/src/xenia/gpu/gl4/ucode.h b/src/xenia/gpu/gl4/ucode.h new file mode 100644 index 000000000..d8d6fb87e --- /dev/null +++ b/src/xenia/gpu/gl4/ucode.h @@ -0,0 +1,549 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2013 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_GPU_GL4_UCODE_H_ +#define XENIA_GPU_GL4_UCODE_H_ + +#include + +#include "xenia/base/assert.h" +#include "xenia/base/platform.h" +#include "xenia/gpu/xenos.h" + +// Closest AMD doc: +// http://developer.amd.com/wordpress/media/2012/10/R600_Instruction_Set_Architecture.pdf +// Microcode format differs, but most fields/enums are the same. + +// This code comes from the freedreno project: +// https://github.com/freedreno/freedreno/blob/master/includes/instr-a2xx.h +/* + * Copyright (c) 2012 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +namespace xe { +namespace gpu { +namespace gl4 { +namespace ucode { + +enum a2xx_sq_surfaceformat { + FMT_1_REVERSE = 0, + FMT_1 = 1, + FMT_8 = 2, + FMT_1_5_5_5 = 3, + FMT_5_6_5 = 4, + FMT_6_5_5 = 5, + FMT_8_8_8_8 = 6, + FMT_2_10_10_10 = 7, + FMT_8_A = 8, + FMT_8_B = 9, + FMT_8_8 = 10, + FMT_Cr_Y1_Cb_Y0 = 11, + FMT_Y1_Cr_Y0_Cb = 12, + FMT_5_5_5_1 = 13, + FMT_8_8_8_8_A = 14, + FMT_4_4_4_4 = 15, + FMT_10_11_11 = 16, + FMT_11_11_10 = 17, + FMT_DXT1 = 18, + FMT_DXT2_3 = 19, + FMT_DXT4_5 = 20, + FMT_24_8 = 22, + FMT_24_8_FLOAT = 23, + FMT_16 = 24, + FMT_16_16 = 25, + FMT_16_16_16_16 = 26, + FMT_16_EXPAND = 27, + FMT_16_16_EXPAND = 28, + FMT_16_16_16_16_EXPAND = 29, + FMT_16_FLOAT = 30, + FMT_16_16_FLOAT = 31, + FMT_16_16_16_16_FLOAT = 32, + FMT_32 = 33, + FMT_32_32 = 34, + FMT_32_32_32_32 = 35, + FMT_32_FLOAT = 36, + FMT_32_32_FLOAT = 37, + FMT_32_32_32_32_FLOAT = 38, + FMT_32_AS_8 = 39, + FMT_32_AS_8_8 = 40, + FMT_16_MPEG = 41, + FMT_16_16_MPEG = 42, + FMT_8_INTERLACED = 43, + FMT_32_AS_8_INTERLACED = 44, + FMT_32_AS_8_8_INTERLACED = 45, + FMT_16_INTERLACED = 46, + FMT_16_MPEG_INTERLACED = 47, + FMT_16_16_MPEG_INTERLACED = 48, + FMT_DXN = 49, + FMT_8_8_8_8_AS_16_16_16_16 = 50, + FMT_DXT1_AS_16_16_16_16 = 51, + FMT_DXT2_3_AS_16_16_16_16 = 52, + FMT_DXT4_5_AS_16_16_16_16 = 53, + FMT_2_10_10_10_AS_16_16_16_16 = 54, + FMT_10_11_11_AS_16_16_16_16 = 55, + FMT_11_11_10_AS_16_16_16_16 = 56, + FMT_32_32_32_FLOAT = 57, + FMT_DXT3A = 58, + FMT_DXT5A = 59, + FMT_CTX1 = 60, + FMT_DXT3A_AS_1_1_1_1 = 61, +}; + +/* + * ALU instructions: + */ + +typedef enum { + ADDs = 0, + ADD_PREVs = 1, + MULs = 2, + MUL_PREVs = 3, + MUL_PREV2s = 4, + MAXs = 5, + MINs = 6, + SETEs = 7, + SETGTs = 8, + SETGTEs = 9, + SETNEs = 10, + FRACs = 11, + TRUNCs = 12, + FLOORs = 13, + EXP_IEEE = 14, + LOG_CLAMP = 15, + LOG_IEEE = 16, + RECIP_CLAMP = 17, + RECIP_FF = 18, + RECIP_IEEE = 19, + RECIPSQ_CLAMP = 20, + RECIPSQ_FF = 21, + RECIPSQ_IEEE = 22, + MOVAs = 23, + MOVA_FLOORs = 24, + SUBs = 25, + SUB_PREVs = 26, + PRED_SETEs = 27, + PRED_SETNEs = 28, + PRED_SETGTs = 29, + PRED_SETGTEs = 30, + PRED_SET_INVs = 31, + PRED_SET_POPs = 32, + PRED_SET_CLRs = 33, + PRED_SET_RESTOREs = 34, + KILLEs = 35, + KILLGTs = 36, + KILLGTEs = 37, + KILLNEs = 38, + KILLONEs = 39, + SQRT_IEEE = 40, + MUL_CONST_0 = 42, + MUL_CONST_1 = 43, + ADD_CONST_0 = 44, + ADD_CONST_1 = 45, + SUB_CONST_0 = 46, + SUB_CONST_1 = 47, + SIN = 48, + COS = 49, + RETAIN_PREV = 50, +} instr_scalar_opc_t; + +typedef enum { + ADDv = 0, + MULv = 1, + MAXv = 2, + MINv = 3, + SETEv = 4, + SETGTv = 5, + SETGTEv = 6, + SETNEv = 7, + FRACv = 8, + TRUNCv = 9, + FLOORv = 10, + MULADDv = 11, + CNDEv = 12, + CNDGTEv = 13, + CNDGTv = 14, + DOT4v = 15, + DOT3v = 16, + DOT2ADDv = 17, + CUBEv = 18, + MAX4v = 19, + PRED_SETE_PUSHv = 20, + PRED_SETNE_PUSHv = 21, + PRED_SETGT_PUSHv = 22, + PRED_SETGTE_PUSHv = 23, + KILLEv = 24, + KILLGTv = 25, + KILLGTEv = 26, + KILLNEv = 27, + DSTv = 28, + MOVAv = 29, +} instr_vector_opc_t; + +XEPACKEDSTRUCT(instr_alu_t, { + /* dword0: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t vector_dest : 6; + uint32_t vector_dest_rel : 1; + uint32_t abs_constants : 1; + uint32_t scalar_dest : 6; + uint32_t scalar_dest_rel : 1; + uint32_t export_data : 1; + uint32_t vector_write_mask : 4; + uint32_t scalar_write_mask : 4; + uint32_t vector_clamp : 1; + uint32_t scalar_clamp : 1; + uint32_t scalar_opc : 6; // instr_scalar_opc_t + }); + /* dword1: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t src3_swiz : 8; + uint32_t src2_swiz : 8; + uint32_t src1_swiz : 8; + uint32_t src3_reg_negate : 1; + uint32_t src2_reg_negate : 1; + uint32_t src1_reg_negate : 1; + uint32_t pred_condition : 1; + uint32_t pred_select : 1; + uint32_t relative_addr : 1; + uint32_t const_1_rel_abs : 1; + uint32_t const_0_rel_abs : 1; + }); + /* dword2: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t src3_reg : 8; + uint32_t src2_reg : 8; + uint32_t src1_reg : 8; + uint32_t vector_opc : 5; // instr_vector_opc_t + uint32_t src3_sel : 1; + uint32_t src2_sel : 1; + uint32_t src1_sel : 1; + }); +}); + +/* + * CF instructions: + */ + +typedef enum { + NOP = 0, + EXEC = 1, + EXEC_END = 2, + COND_EXEC = 3, + COND_EXEC_END = 4, + COND_PRED_EXEC = 5, + COND_PRED_EXEC_END = 6, + LOOP_START = 7, + LOOP_END = 8, + COND_CALL = 9, + RETURN = 10, + COND_JMP = 11, + ALLOC = 12, + COND_EXEC_PRED_CLEAN = 13, + COND_EXEC_PRED_CLEAN_END = 14, + MARK_VS_FETCH_DONE = 15, +} instr_cf_opc_t; + +typedef enum { + RELATIVE_ADDR = 0, + ABSOLUTE_ADDR = 1, +} instr_addr_mode_t; + +typedef enum { + SQ_NO_ALLOC = 0, + SQ_POSITION = 1, + SQ_PARAMETER_PIXEL = 2, + SQ_MEMORY = 3, +} instr_alloc_type_t; + +XEPACKEDSTRUCT(instr_cf_exec_t, { + XEPACKEDSTRUCTANONYMOUS({ + uint32_t address : 12; + uint32_t count : 3; + uint32_t yeild : 1; + uint32_t serialize : 12; + uint32_t vc_hi : 4; + }); + XEPACKEDSTRUCTANONYMOUS({ + uint32_t vc_lo : 2; /* vertex cache? */ + uint32_t bool_addr : 8; + uint32_t pred_condition : 1; + uint32_t address_mode : 1; // instr_addr_mode_t + uint32_t opc : 4; // instr_cf_opc_t + }); + bool is_cond_exec() const { + return (this->opc == COND_EXEC) || (this->opc == COND_EXEC_END) || + (this->opc == COND_PRED_EXEC) || (this->opc == COND_PRED_EXEC_END) || + (this->opc == COND_EXEC_PRED_CLEAN) || + (this->opc == COND_EXEC_PRED_CLEAN_END); + } +}); + +XEPACKEDSTRUCT(instr_cf_loop_t, { + XEPACKEDSTRUCTANONYMOUS({ + uint32_t address : 13; + uint32_t repeat : 1; + uint32_t reserved0 : 2; + uint32_t loop_id : 5; + uint32_t pred_break : 1; + uint32_t reserved1_hi : 10; + }); + XEPACKEDSTRUCTANONYMOUS({ + uint32_t reserved1_lo : 10; + uint32_t condition : 1; + uint32_t address_mode : 1; // instr_addr_mode_t + uint32_t opc : 4; // instr_cf_opc_t + }); +}); + +XEPACKEDSTRUCT(instr_cf_jmp_call_t, { + XEPACKEDSTRUCTANONYMOUS({ + uint32_t address : 13; + uint32_t force_call : 1; + uint32_t predicated_jmp : 1; + uint32_t reserved1_hi : 17; + }); + XEPACKEDSTRUCTANONYMOUS({ + uint32_t reserved1_lo : 1; + uint32_t direction : 1; + uint32_t bool_addr : 8; + uint32_t condition : 1; + uint32_t address_mode : 1; // instr_addr_mode_t + uint32_t opc : 4; // instr_cf_opc_t + }); +}); + +XEPACKEDSTRUCT(instr_cf_alloc_t, { + XEPACKEDSTRUCTANONYMOUS({ + uint32_t size : 3; + uint32_t reserved0_hi : 29; + }); + XEPACKEDSTRUCTANONYMOUS({ + uint32_t reserved0_lo : 8; + uint32_t no_serial : 1; + uint32_t buffer_select : 2; // instr_alloc_type_t + uint32_t alloc_mode : 1; + uint32_t opc : 4; // instr_cf_opc_t + }); +}); + +XEPACKEDUNION(instr_cf_t, { + instr_cf_exec_t exec; + instr_cf_loop_t loop; + instr_cf_jmp_call_t jmp_call; + instr_cf_alloc_t alloc; + XEPACKEDSTRUCTANONYMOUS({ + uint32_t: + 32; + uint32_t: + 12; + uint32_t opc : 4; // instr_cf_opc_t + }); + XEPACKEDSTRUCTANONYMOUS({ + uint32_t dword_0; + uint32_t dword_1; + }); + + bool is_exec() const { + return (this->opc == EXEC) || (this->opc == EXEC_END) || + (this->opc == COND_EXEC) || (this->opc == COND_EXEC_END) || + (this->opc == COND_PRED_EXEC) || (this->opc == COND_PRED_EXEC_END) || + (this->opc == COND_EXEC_PRED_CLEAN) || + (this->opc == COND_EXEC_PRED_CLEAN_END); + } + bool is_cond_exec() const { + return (this->opc == COND_EXEC) || (this->opc == COND_EXEC_END) || + (this->opc == COND_PRED_EXEC) || (this->opc == COND_PRED_EXEC_END) || + (this->opc == COND_EXEC_PRED_CLEAN) || + (this->opc == COND_EXEC_PRED_CLEAN_END); + } +}); + +/* + * FETCH instructions: + */ + +typedef enum { + VTX_FETCH = 0, + TEX_FETCH = 1, + TEX_GET_BORDER_COLOR_FRAC = 16, + TEX_GET_COMP_TEX_LOD = 17, + TEX_GET_GRADIENTS = 18, + TEX_GET_WEIGHTS = 19, + TEX_SET_TEX_LOD = 24, + TEX_SET_GRADIENTS_H = 25, + TEX_SET_GRADIENTS_V = 26, + TEX_RESERVED_4 = 27, +} instr_fetch_opc_t; + +typedef enum { + TEX_FILTER_POINT = 0, + TEX_FILTER_LINEAR = 1, + TEX_FILTER_BASEMAP = 2, /* only applicable for mip-filter */ + TEX_FILTER_USE_FETCH_CONST = 3, +} instr_tex_filter_t; + +typedef enum { + ANISO_FILTER_DISABLED = 0, + ANISO_FILTER_MAX_1_1 = 1, + ANISO_FILTER_MAX_2_1 = 2, + ANISO_FILTER_MAX_4_1 = 3, + ANISO_FILTER_MAX_8_1 = 4, + ANISO_FILTER_MAX_16_1 = 5, + ANISO_FILTER_USE_FETCH_CONST = 7, +} instr_aniso_filter_t; + +typedef enum { + ARBITRARY_FILTER_2X4_SYM = 0, + ARBITRARY_FILTER_2X4_ASYM = 1, + ARBITRARY_FILTER_4X2_SYM = 2, + ARBITRARY_FILTER_4X2_ASYM = 3, + ARBITRARY_FILTER_4X4_SYM = 4, + ARBITRARY_FILTER_4X4_ASYM = 5, + ARBITRARY_FILTER_USE_FETCH_CONST = 7, +} instr_arbitrary_filter_t; + +typedef enum { + SAMPLE_CENTROID = 0, + SAMPLE_CENTER = 1, +} instr_sample_loc_t; + +typedef enum { + DIMENSION_1D = 0, + DIMENSION_2D = 1, + DIMENSION_3D = 2, + DIMENSION_CUBE = 3, +} instr_dimension_t; + +typedef enum a2xx_sq_surfaceformat instr_surf_fmt_t; + +XEPACKEDSTRUCT(instr_fetch_tex_t, { + /* dword0: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t opc : 5; // instr_fetch_opc_t + uint32_t src_reg : 6; + uint32_t src_reg_am : 1; + uint32_t dst_reg : 6; + uint32_t dst_reg_am : 1; + uint32_t fetch_valid_only : 1; + uint32_t const_idx : 5; + uint32_t tx_coord_denorm : 1; + uint32_t src_swiz : 6; // xyz + }); + /* dword1: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t dst_swiz : 12; // xyzw + uint32_t mag_filter : 2; // instr_tex_filter_t + uint32_t min_filter : 2; // instr_tex_filter_t + uint32_t mip_filter : 2; // instr_tex_filter_t + uint32_t aniso_filter : 3; // instr_aniso_filter_t + uint32_t arbitrary_filter : 3; // instr_arbitrary_filter_t + uint32_t vol_mag_filter : 2; // instr_tex_filter_t + uint32_t vol_min_filter : 2; // instr_tex_filter_t + uint32_t use_comp_lod : 1; + uint32_t use_reg_lod : 1; + uint32_t unk : 1; + uint32_t pred_select : 1; + }); + /* dword2: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t use_reg_gradients : 1; + uint32_t sample_location : 1; // instr_sample_loc_t + uint32_t lod_bias : 7; + uint32_t unused : 5; + uint32_t dimension : 2; // instr_dimension_t + uint32_t offset_x : 5; + uint32_t offset_y : 5; + uint32_t offset_z : 5; + uint32_t pred_condition : 1; + }); +}); + +XEPACKEDSTRUCT(instr_fetch_vtx_t, { + /* dword0: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t opc : 5; // instr_fetch_opc_t + uint32_t src_reg : 6; + uint32_t src_reg_am : 1; + uint32_t dst_reg : 6; + uint32_t dst_reg_am : 1; + uint32_t must_be_one : 1; + uint32_t const_index : 5; + uint32_t const_index_sel : 2; + uint32_t reserved0 : 3; + uint32_t src_swiz : 2; + }); + /* dword1: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t dst_swiz : 12; + uint32_t format_comp_all : 1; /* '1' for signed, '0' for unsigned? */ + uint32_t num_format_all : 1; /* '0' for normalized, '1' for unnormalized */ + uint32_t signed_rf_mode_all : 1; + uint32_t reserved1 : 1; + uint32_t format : 6; // instr_surf_fmt_t + uint32_t reserved2 : 1; + uint32_t exp_adjust_all : 7; + uint32_t reserved3 : 1; + uint32_t pred_select : 1; + }); + /* dword2: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t stride : 8; + uint32_t offset : 23; + uint32_t pred_condition : 1; + }); +}); + +XEPACKEDUNION(instr_fetch_t, { + instr_fetch_tex_t tex; + instr_fetch_vtx_t vtx; + XEPACKEDSTRUCTANONYMOUS({ + /* dword0: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t opc : 5; // instr_fetch_opc_t + uint32_t: + 27; + }); + /* dword1: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t: + 32; + }); + /* dword2: */ + XEPACKEDSTRUCTANONYMOUS({ + uint32_t: + 32; + }); + }); +}); + +} // namespace ucode +} // namespace gl4 +} // namespace gpu +} // namespace xe + +#endif // XENIA_GPU_GL4_UCODE_H_ diff --git a/src/xenia/gpu/ucode_disassembler.cc b/src/xenia/gpu/gl4/ucode_disassembler.cc similarity index 99% rename from src/xenia/gpu/ucode_disassembler.cc rename to src/xenia/gpu/gl4/ucode_disassembler.cc index b2332829f..2726f6594 100644 --- a/src/xenia/gpu/ucode_disassembler.cc +++ b/src/xenia/gpu/gl4/ucode_disassembler.cc @@ -30,7 +30,7 @@ * SOFTWARE. */ -#include "xenia/gpu/ucode_disassembler.h" +#include "xenia/gpu/gl4/ucode_disassembler.h" #include #include @@ -39,11 +39,13 @@ #include "xenia/base/assert.h" #include "xenia/base/string_buffer.h" +#include "xenia/gpu/gl4/ucode.h" namespace xe { namespace gpu { +namespace gl4 { -using namespace xe::gpu::ucode; +using namespace xe::gpu::gl4::ucode; using namespace xe::gpu::xenos; static const char* levels[] = { @@ -773,5 +775,6 @@ std::string DisassembleShader(ShaderType type, const uint32_t* dwords, return string_buffer.to_string(); } +} // namespace gl4 } // namespace gpu } // namespace xe diff --git a/src/xenia/gpu/ucode_disassembler.h b/src/xenia/gpu/gl4/ucode_disassembler.h similarity index 81% rename from src/xenia/gpu/ucode_disassembler.h rename to src/xenia/gpu/gl4/ucode_disassembler.h index 22d09eb09..834a229f1 100644 --- a/src/xenia/gpu/ucode_disassembler.h +++ b/src/xenia/gpu/gl4/ucode_disassembler.h @@ -7,21 +7,22 @@ ****************************************************************************** */ -#ifndef XENIA_GPU_UCODE_DISASSEMBLER_H_ -#define XENIA_GPU_UCODE_DISASSEMBLER_H_ +#ifndef XENIA_GPU_GL4_UCODE_DISASSEMBLER_H_ +#define XENIA_GPU_GL4_UCODE_DISASSEMBLER_H_ #include -#include "xenia/gpu/ucode.h" #include "xenia/gpu/xenos.h" namespace xe { namespace gpu { +namespace gl4 { std::string DisassembleShader(ShaderType type, const uint32_t* dwords, size_t dword_count); +} // namespace gl4 } // namespace gpu } // namespace xe -#endif // XENIA_GPU_UCODE_DISASSEMBLER_H_ +#endif // XENIA_GPU_GL4_UCODE_DISASSEMBLER_H_ diff --git a/src/xenia/gpu/sampler_info.cc b/src/xenia/gpu/sampler_info.cc index 16b790d50..c11ecccab 100644 --- a/src/xenia/gpu/sampler_info.cc +++ b/src/xenia/gpu/sampler_info.cc @@ -18,20 +18,20 @@ namespace xe { namespace gpu { bool SamplerInfo::Prepare(const xenos::xe_gpu_texture_fetch_t& fetch, - const ucode::instr_fetch_tex_t& fetch_instr, + const gl4::ucode::instr_fetch_tex_t& fetch_instr, SamplerInfo* out_info) { std::memset(out_info, 0, sizeof(SamplerInfo)); - out_info->min_filter = static_cast( + out_info->min_filter = static_cast( fetch_instr.min_filter == 3 ? fetch.min_filter : fetch_instr.min_filter); - out_info->mag_filter = static_cast( + out_info->mag_filter = static_cast( fetch_instr.mag_filter == 3 ? fetch.mag_filter : fetch_instr.mag_filter); - out_info->mip_filter = static_cast( + out_info->mip_filter = static_cast( fetch_instr.mip_filter == 3 ? fetch.mip_filter : fetch_instr.mip_filter); - out_info->clamp_u = fetch.clamp_x; - out_info->clamp_v = fetch.clamp_y; - out_info->clamp_w = fetch.clamp_z; - out_info->aniso_filter = static_cast( + out_info->clamp_u = static_cast(fetch.clamp_x); + out_info->clamp_v = static_cast(fetch.clamp_y); + out_info->clamp_w = static_cast(fetch.clamp_z); + out_info->aniso_filter = static_cast( fetch_instr.aniso_filter == 7 ? fetch.aniso_filter : fetch_instr.aniso_filter); diff --git a/src/xenia/gpu/sampler_info.h b/src/xenia/gpu/sampler_info.h index 4cc310731..1a776664c 100644 --- a/src/xenia/gpu/sampler_info.h +++ b/src/xenia/gpu/sampler_info.h @@ -10,23 +10,23 @@ #ifndef XENIA_GPU_SAMPLER_INFO_H_ #define XENIA_GPU_SAMPLER_INFO_H_ -#include "xenia/gpu/ucode.h" +#include "xenia/gpu/gl4/ucode.h" #include "xenia/gpu/xenos.h" namespace xe { namespace gpu { struct SamplerInfo { - ucode::instr_tex_filter_t min_filter; - ucode::instr_tex_filter_t mag_filter; - ucode::instr_tex_filter_t mip_filter; - uint32_t clamp_u; - uint32_t clamp_v; - uint32_t clamp_w; - ucode::instr_aniso_filter_t aniso_filter; + TextureFilter min_filter; + TextureFilter mag_filter; + TextureFilter mip_filter; + ClampMode clamp_u; + ClampMode clamp_v; + ClampMode clamp_w; + AnisoFilter aniso_filter; static bool Prepare(const xenos::xe_gpu_texture_fetch_t& fetch, - const ucode::instr_fetch_tex_t& fetch_instr, + const gl4::ucode::instr_fetch_tex_t& fetch_instr, SamplerInfo* out_info); uint64_t hash() const; diff --git a/src/xenia/gpu/shader.cc b/src/xenia/gpu/shader.cc index 2ae0701dd..f5e95dc52 100644 --- a/src/xenia/gpu/shader.cc +++ b/src/xenia/gpu/shader.cc @@ -13,12 +13,12 @@ #include "xenia/base/math.h" #include "xenia/base/memory.h" -#include "xenia/gpu/ucode_disassembler.h" +#include "xenia/gpu/gl4/ucode_disassembler.h" namespace xe { namespace gpu { -using namespace xe::gpu::ucode; +using namespace xe::gpu::gl4::ucode; using namespace xe::gpu::xenos; Shader::Shader(ShaderType shader_type, uint64_t data_hash, @@ -33,7 +33,7 @@ Shader::Shader(ShaderType shader_type, uint64_t data_hash, // Disassemble ucode and stash. // TODO(benvanik): debug only. ucode_disassembly_ = - DisassembleShader(shader_type_, data_.data(), data_.size()); + gl4::DisassembleShader(shader_type_, data_.data(), data_.size()); // Gather input/output registers/etc. GatherIO(); diff --git a/src/xenia/gpu/shader.h b/src/xenia/gpu/shader.h index 2ec58e46b..47cf0c201 100644 --- a/src/xenia/gpu/shader.h +++ b/src/xenia/gpu/shader.h @@ -13,7 +13,7 @@ #include #include -#include "xenia/gpu/ucode.h" +#include "xenia/gpu/gl4/ucode.h" #include "xenia/gpu/xenos.h" namespace xe { @@ -36,8 +36,8 @@ class Shader { uint32_t dword_count() const { return uint32_t(data_.size()); } struct BufferDescElement { - ucode::instr_fetch_vtx_t vtx_fetch; - xenos::VertexFormat format; + gl4::ucode::instr_fetch_vtx_t vtx_fetch; + VertexFormat format; uint32_t offset_words; uint32_t size_words; bool is_signed; @@ -61,7 +61,7 @@ class Shader { uint32_t input_index; uint32_t fetch_slot; uint32_t format; - ucode::instr_fetch_tex_t tex_fetch; + gl4::ucode::instr_fetch_tex_t tex_fetch; }; struct SamplerInputs { uint32_t count; @@ -83,10 +83,10 @@ class Shader { uint32_t dword_count); void GatherIO(); - void GatherAlloc(const ucode::instr_cf_alloc_t* cf); - void GatherExec(const ucode::instr_cf_exec_t* cf); - void GatherVertexFetch(const ucode::instr_fetch_vtx_t* vtx); - void GatherTextureFetch(const ucode::instr_fetch_tex_t* tex); + void GatherAlloc(const gl4::ucode::instr_cf_alloc_t* cf); + void GatherExec(const gl4::ucode::instr_cf_exec_t* cf); + void GatherVertexFetch(const gl4::ucode::instr_fetch_vtx_t* vtx); + void GatherTextureFetch(const gl4::ucode::instr_fetch_tex_t* tex); ShaderType shader_type_; uint64_t data_hash_; @@ -100,7 +100,7 @@ class Shader { std::string error_log_; AllocCounts alloc_counts_; - std::vector allocs_; + std::vector allocs_; BufferInputs buffer_inputs_; SamplerInputs sampler_inputs_; }; diff --git a/src/xenia/gpu/texture_info.cc b/src/xenia/gpu/texture_info.cc index 2a1fa40f3..2de06e973 100644 --- a/src/xenia/gpu/texture_info.cc +++ b/src/xenia/gpu/texture_info.cc @@ -18,7 +18,6 @@ namespace xe { namespace gpu { -using namespace xe::gpu::ucode; using namespace xe::gpu::xenos; const FormatInfo* FormatInfo::Get(uint32_t gpu_format) { diff --git a/src/xenia/gpu/texture_info.h b/src/xenia/gpu/texture_info.h index d417e026a..aa05d890c 100644 --- a/src/xenia/gpu/texture_info.h +++ b/src/xenia/gpu/texture_info.h @@ -14,7 +14,6 @@ #include #include "xenia/base/assert.h" -#include "xenia/gpu/ucode.h" #include "xenia/gpu/xenos.h" namespace xe { @@ -89,37 +88,36 @@ enum class TextureFormat : uint32_t { kUnknown = 0xFFFFFFFFu, }; -inline TextureFormat ColorFormatToTextureFormat( - xenos::ColorFormat color_format) { +inline TextureFormat ColorFormatToTextureFormat(ColorFormat color_format) { return static_cast(color_format); } inline TextureFormat ColorRenderTargetToTextureFormat( - xenos::ColorRenderTargetFormat color_format) { + ColorRenderTargetFormat color_format) { switch (color_format) { - case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case ColorRenderTargetFormat::k_8_8_8_8: return TextureFormat::k_8_8_8_8; - case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + case ColorRenderTargetFormat::k_8_8_8_8_GAMMA: return TextureFormat::k_8_8_8_8; - case xenos::ColorRenderTargetFormat::k_2_10_10_10: + case ColorRenderTargetFormat::k_2_10_10_10: return TextureFormat::k_2_10_10_10; - case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: + case ColorRenderTargetFormat::k_2_10_10_10_FLOAT: return TextureFormat::k_2_10_10_10_FLOAT; - case xenos::ColorRenderTargetFormat::k_16_16: + case ColorRenderTargetFormat::k_16_16: return TextureFormat::k_16_16; - case xenos::ColorRenderTargetFormat::k_16_16_16_16: + case ColorRenderTargetFormat::k_16_16_16_16: return TextureFormat::k_16_16_16_16; - case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + case ColorRenderTargetFormat::k_16_16_FLOAT: return TextureFormat::k_16_16_FLOAT; - case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + case ColorRenderTargetFormat::k_16_16_16_16_FLOAT: return TextureFormat::k_16_16_16_16_FLOAT; - case xenos::ColorRenderTargetFormat::k_2_10_10_10_unknown: + case ColorRenderTargetFormat::k_2_10_10_10_unknown: return TextureFormat::k_2_10_10_10; - case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_unknown: + case ColorRenderTargetFormat::k_2_10_10_10_FLOAT_unknown: return TextureFormat::k_2_10_10_10_FLOAT; - case xenos::ColorRenderTargetFormat::k_32_FLOAT: + case ColorRenderTargetFormat::k_32_FLOAT: return TextureFormat::k_32_FLOAT; - case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: + case ColorRenderTargetFormat::k_32_32_FLOAT: return TextureFormat::k_32_32_FLOAT; default: assert_unhandled_case(color_format); @@ -128,11 +126,11 @@ inline TextureFormat ColorRenderTargetToTextureFormat( } inline TextureFormat DepthRenderTargetToTextureFormat( - xenos::DepthRenderTargetFormat depth_format) { + DepthRenderTargetFormat depth_format) { switch (depth_format) { - case xenos::DepthRenderTargetFormat::kD24S8: + case DepthRenderTargetFormat::kD24S8: return TextureFormat::k_24_8; - case xenos::DepthRenderTargetFormat::kD24FS8: + case DepthRenderTargetFormat::kD24FS8: return TextureFormat::k_24_8_FLOAT; default: assert_unhandled_case(depth_format); @@ -163,7 +161,7 @@ struct TextureInfo { uint32_t height; uint32_t depth; const FormatInfo* format_info; - xenos::Endian endianness; + Endian endianness; bool is_tiled; uint32_t input_length; uint32_t output_length; diff --git a/src/xenia/gpu/trace_viewer.h b/src/xenia/gpu/trace_viewer.h index 542a553cf..f11927b4b 100644 --- a/src/xenia/gpu/trace_viewer.h +++ b/src/xenia/gpu/trace_viewer.h @@ -48,12 +48,12 @@ class TraceViewer { void DrawMultilineString(const std::string& str); - virtual uintptr_t GetColorRenderTarget( - uint32_t pitch, xenos::MsaaSamples samples, uint32_t base, - xenos::ColorRenderTargetFormat format) = 0; - virtual uintptr_t GetDepthRenderTarget( - uint32_t pitch, xenos::MsaaSamples samples, uint32_t base, - xenos::DepthRenderTargetFormat format) = 0; + virtual uintptr_t GetColorRenderTarget(uint32_t pitch, MsaaSamples samples, + uint32_t base, + ColorRenderTargetFormat format) = 0; + virtual uintptr_t GetDepthRenderTarget(uint32_t pitch, MsaaSamples samples, + uint32_t base, + DepthRenderTargetFormat format) = 0; virtual uintptr_t GetTextureEntry(const TextureInfo& texture_info, const SamplerInfo& sampler_info) = 0; diff --git a/src/xenia/gpu/xenos.h b/src/xenia/gpu/xenos.h index 87267eb50..0e5daa92e 100644 --- a/src/xenia/gpu/xenos.h +++ b/src/xenia/gpu/xenos.h @@ -12,7 +12,21 @@ #include "xenia/base/assert.h" #include "xenia/base/byte_order.h" -#include "xenia/gpu/ucode.h" + +#if XE_COMPILER_MSVC +#define XEPACKEDSTRUCT(name, value) \ + __pragma(pack(push, 1)) struct name##_s value __pragma(pack(pop)); \ + typedef struct name##_s name; +#define XEPACKEDSTRUCTANONYMOUS(value) \ + __pragma(pack(push, 1)) struct value __pragma(pack(pop)); +#define XEPACKEDUNION(name, value) \ + __pragma(pack(push, 1)) union name##_s value __pragma(pack(pop)); \ + typedef union name##_s name; +#else +#define XEPACKEDSTRUCT(name, value) struct __attribute__((packed)) name value; +#define XEPACKEDSTRUCTANONYMOUS(value) struct __attribute__((packed)) value; +#define XEPACKEDUNION(name, value) union __attribute__((packed)) name value; +#endif // XE_PLATFORM_WIN32 namespace xe { namespace gpu { @@ -44,14 +58,45 @@ enum class Dimension : uint32_t { kCube = 3, }; -namespace xenos { +enum class ClampMode : uint32_t { + kRepeat = 0, + kMirroredRepeat = 1, + kClampToEdge = 2, + kMirrorClampToEdge = 3, + kClampToHalfway = 4, + kMirrorClampToHalfway = 5, + kClampToBorder = 6, + kMirrorClampToBorder = 7, +}; -typedef enum { - XE_GPU_INVALIDATE_MASK_VERTEX_SHADER = 1 << 8, - XE_GPU_INVALIDATE_MASK_PIXEL_SHADER = 1 << 9, +enum class TextureFilter : uint32_t { + kPoint = 0, + kLinear = 1, + kBaseMap = 2, // Only applicable for mip-filter. + kUseFetchConst = 3, +}; - XE_GPU_INVALIDATE_MASK_ALL = 0x7FFF, -} XE_GPU_INVALIDATE_MASK; +enum class AnisoFilter : uint32_t { + kDisabled = 0, + kMax_1_1 = 1, + kMax_2_1 = 2, + kMax_4_1 = 3, + kMax_8_1 = 4, + kMax_16_1 = 5, + kUseFetchConst = 7, +}; + +enum class TextureDimension : uint32_t { + k1D = 0, + k2D = 1, + k3D = 2, + kCube = 3, +}; + +enum class SampleLocation : uint32_t { + kCentroid = 0, + kCenter = 1, +}; enum class Endian : uint32_t { kUnspecified = 0, @@ -100,20 +145,6 @@ enum class DepthRenderTargetFormat : uint32_t { kD24FS8 = 1, }; -enum class ModeControl : uint32_t { - kIgnore = 0, - kColorDepth = 4, - kDepth = 5, - kCopy = 6, -}; - -enum class CopyCommand : uint32_t { - kRaw = 0, - kConvert = 1, - kConstantOne = 2, - kNull = 3, // ? -}; - // Subset of a2xx_sq_surfaceformat. enum class ColorFormat : uint32_t { k_8 = 2, @@ -144,6 +175,7 @@ enum class ColorFormat : uint32_t { }; enum class VertexFormat : uint32_t { + kUndefined = 0, k_8_8_8_8 = 6, k_2_10_10_10 = 7, k_10_11_11 = 16, @@ -160,6 +192,30 @@ enum class VertexFormat : uint32_t { k_32_32_32_32_FLOAT = 38, k_32_32_32_FLOAT = 57, }; + +namespace xenos { + +typedef enum { + XE_GPU_INVALIDATE_MASK_VERTEX_SHADER = 1 << 8, + XE_GPU_INVALIDATE_MASK_PIXEL_SHADER = 1 << 9, + + XE_GPU_INVALIDATE_MASK_ALL = 0x7FFF, +} XE_GPU_INVALIDATE_MASK; + +enum class ModeControl : uint32_t { + kIgnore = 0, + kColorDepth = 4, + kDepth = 5, + kCopy = 6, +}; + +enum class CopyCommand : uint32_t { + kRaw = 0, + kConvert = 1, + kConstantOne = 2, + kNull = 3, // ? +}; + inline int GetVertexFormatComponentCount(VertexFormat format) { switch (format) { case VertexFormat::k_32: diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc b/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc index 0d6dae6e8..345509b05 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc @@ -345,10 +345,10 @@ void VdSwap(lpvoid_t buffer_ptr, // ptr into primary ringbuffer reinterpret_cast(&fetch), reinterpret_cast(fetch_ptr.host_address()), 6); - auto color_format = gpu::xenos::ColorFormat(color_format_ptr.value()); + auto color_format = gpu::ColorFormat(color_format_ptr.value()); auto color_space = *color_space_ptr; - assert_true(color_format == gpu::xenos::ColorFormat::k_8_8_8_8 || - color_format == gpu::xenos::ColorFormat::kUnknown0x36); + assert_true(color_format == gpu::ColorFormat::k_8_8_8_8 || + color_format == gpu::ColorFormat::kUnknown0x36); assert_true(color_space == 0); assert_true(*frontbuffer_ptr == fetch.address << 12); assert_true(last_frontbuffer_width_ == 1 + fetch.size_2d.width);