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Fixing some GPU->CPU addresses.

This commit is contained in:
Ben Vanik 2014-10-28 20:32:15 -07:00
parent 1f9eff2938
commit b46a8b3618
2 changed files with 11 additions and 2 deletions
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7
src/xenia/gpu/shader_resource.cc
View File

@ -12,6 +12,8 @@
#include <poly/math.h>
#include <xenia/gpu/xenos/ucode_disassembler.h>
const bool kAssertOnZeroShaders = false;
using namespace std;
using namespace xe;
using namespace xe::gpu;
@ -35,8 +37,13 @@ ShaderResource::ShaderResource(const MemoryRange& memory_range,
// Copy bytes and swap.
size_t byte_size = dword_count_ * sizeof(uint32_t);
dwords_ = (uint32_t*)malloc(byte_size);
bool any_nonzero = false;
for (uint32_t n = 0; n < dword_count_; n++) {
dwords_[n] = poly::load_and_swap<uint32_t>(memory_range.host_base + n * 4);
any_nonzero = any_nonzero || dwords_[n] != 0;
}
if (kAssertOnZeroShaders) {
assert_true(any_nonzero);
}
// Disassemble, for debugging.

6
src/xenia/gpu/xenos/xenos.h
View File

@ -94,8 +94,10 @@ inline uint32_t GpuToCpu(uint32_t p) {
}
inline uint32_t GpuToCpu(uint32_t base, uint32_t p) {
uint32_t upper = base & 0xFF000000;
uint32_t lower = p & 0x00FFFFFF;
// Some AMD docs say relative to base ptr, some say just this.
// Some games use some crazy shift magic, but it seems to nop.
uint32_t upper = 0;//base & 0xFF000000;
uint32_t lower = p & 0x01FFFFFF;
return upper + lower;// -(((base >> 20) + 0x200) & 0x1000);
}