From a593d940ebdb255fca676448db99e0357cb0cf82 Mon Sep 17 00:00:00 2001
From: Ben Vanik <ben.vanik@gmail.com>
Date: Mon, 4 Aug 2014 18:54:44 -0700
Subject: [PATCH] std min/max.

---
 src/alloy/backend/ivm/ivm_intcode.cc | 32 ++++++++++++++--------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/alloy/backend/ivm/ivm_intcode.cc b/src/alloy/backend/ivm/ivm_intcode.cc
index 04a306b69..d69abd773 100644
--- a/src/alloy/backend/ivm/ivm_intcode.cc
+++ b/src/alloy/backend/ivm/ivm_intcode.cc
@@ -1163,7 +1163,7 @@ static uint8_t __lvsr_table[17][16] = {
 };
 
 uint32_t IntCode_LOAD_VECTOR_SHL(IntCodeState& ics, const IntCode* i) {
-  int8_t sh = MIN(16, ics.rf[i->src1_reg].i8);
+  int8_t sh = std::min<int8_t>(16, ics.rf[i->src1_reg].i8);
   vec128_t& dest = ics.rf[i->dest_reg].v128;
   for (int n = 0; n < 16; n++) {
     VECB16(dest, n) = __lvsl_table[sh][n];
@@ -1175,7 +1175,7 @@ int Translate_LOAD_VECTOR_SHL(TranslationContext& ctx, Instr* i) {
 }
 
 uint32_t IntCode_LOAD_VECTOR_SHR(IntCodeState& ics, const IntCode* i) {
-  int8_t sh = MIN(16, ics.rf[i->src1_reg].i8);
+  int8_t sh = std::min<int8_t>(16, ics.rf[i->src1_reg].i8);
   vec128_t& dest = ics.rf[i->dest_reg].v128;
   for (int n = 0; n < 16; n++) {
     VECB16(dest, n) = __lvsr_table[sh][n];
@@ -1589,35 +1589,35 @@ int Translate_PREFETCH(TranslationContext& ctx, Instr* i) {
 uint32_t IntCode_MAX_I8_I8(IntCodeState& ics, const IntCode* i) {
   int8_t a = ics.rf[i->src1_reg].i8;
   int8_t b = ics.rf[i->src2_reg].i8;
-  ics.rf[i->dest_reg].i8 = MAX(a, b);
+  ics.rf[i->dest_reg].i8 = std::max(a, b);
   return IA_NEXT;
 }
 uint32_t IntCode_MAX_I16_I16(IntCodeState& ics, const IntCode* i) {
   int16_t a = ics.rf[i->src1_reg].i16;
   int16_t b = ics.rf[i->src2_reg].i16;
-  ics.rf[i->dest_reg].i16 = MAX(a, b);
+  ics.rf[i->dest_reg].i16 = std::max(a, b);
   return IA_NEXT;
 }
 uint32_t IntCode_MAX_I32_I32(IntCodeState& ics, const IntCode* i) {
   int32_t a = ics.rf[i->src1_reg].i32;
   int32_t b = ics.rf[i->src2_reg].i32;
-  ics.rf[i->dest_reg].i32 = MAX(a, b);
+  ics.rf[i->dest_reg].i32 = std::max(a, b);
   return IA_NEXT;
 }
 uint32_t IntCode_MAX_I64_I64(IntCodeState& ics, const IntCode* i) {
   int64_t a = ics.rf[i->src1_reg].i64;
   int64_t b = ics.rf[i->src2_reg].i64;
-  ics.rf[i->dest_reg].i64 = MAX(a, b);
+  ics.rf[i->dest_reg].i64 = std::max(a, b);
   return IA_NEXT;
 }
 uint32_t IntCode_MAX_F32_F32(IntCodeState& ics, const IntCode* i) {
   ics.rf[i->dest_reg].f32 =
-      MAX(ics.rf[i->src1_reg].f32, ics.rf[i->src2_reg].f32);
+      std::max(ics.rf[i->src1_reg].f32, ics.rf[i->src2_reg].f32);
   return IA_NEXT;
 }
 uint32_t IntCode_MAX_F64_F64(IntCodeState& ics, const IntCode* i) {
   ics.rf[i->dest_reg].f64 =
-      MAX(ics.rf[i->src1_reg].f64, ics.rf[i->src2_reg].f64);
+      std::max(ics.rf[i->src1_reg].f64, ics.rf[i->src2_reg].f64);
   return IA_NEXT;
 }
 uint32_t IntCode_MAX_V128_V128(IntCodeState& ics, const IntCode* i) {
@@ -1625,7 +1625,7 @@ uint32_t IntCode_MAX_V128_V128(IntCodeState& ics, const IntCode* i) {
   const vec128_t& src2 = ics.rf[i->src2_reg].v128;
   vec128_t& dest = ics.rf[i->dest_reg].v128;
   for (int n = 0; n < 4; n++) {
-    dest.f4[n] = MAX(src1.f4[n], src2.f4[n]);
+    dest.f4[n] = std::max(src1.f4[n], src2.f4[n]);
   }
   return IA_NEXT;
 }
@@ -1712,35 +1712,35 @@ int Translate_VECTOR_MAX(TranslationContext& ctx, Instr* i) {
 uint32_t IntCode_MIN_I8_I8(IntCodeState& ics, const IntCode* i) {
   int8_t a = ics.rf[i->src1_reg].i8;
   int8_t b = ics.rf[i->src2_reg].i8;
-  ics.rf[i->dest_reg].i8 = MIN(a, b);
+  ics.rf[i->dest_reg].i8 = std::min(a, b);
   return IA_NEXT;
 }
 uint32_t IntCode_MIN_I16_I16(IntCodeState& ics, const IntCode* i) {
   int16_t a = ics.rf[i->src1_reg].i16;
   int16_t b = ics.rf[i->src2_reg].i16;
-  ics.rf[i->dest_reg].i16 = MIN(a, b);
+  ics.rf[i->dest_reg].i16 = std::min(a, b);
   return IA_NEXT;
 }
 uint32_t IntCode_MIN_I32_I32(IntCodeState& ics, const IntCode* i) {
   int32_t a = ics.rf[i->src1_reg].i32;
   int32_t b = ics.rf[i->src2_reg].i32;
-  ics.rf[i->dest_reg].i32 = MIN(a, b);
+  ics.rf[i->dest_reg].i32 = std::min(a, b);
   return IA_NEXT;
 }
 uint32_t IntCode_MIN_I64_I64(IntCodeState& ics, const IntCode* i) {
   int64_t a = ics.rf[i->src1_reg].i64;
   int64_t b = ics.rf[i->src2_reg].i64;
-  ics.rf[i->dest_reg].i64 = MIN(a, b);
+  ics.rf[i->dest_reg].i64 = std::min(a, b);
   return IA_NEXT;
 }
 uint32_t IntCode_MIN_F32_F32(IntCodeState& ics, const IntCode* i) {
   ics.rf[i->dest_reg].f32 =
-      MIN(ics.rf[i->src1_reg].f32, ics.rf[i->src2_reg].f32);
+      std::min(ics.rf[i->src1_reg].f32, ics.rf[i->src2_reg].f32);
   return IA_NEXT;
 }
 uint32_t IntCode_MIN_F64_F64(IntCodeState& ics, const IntCode* i) {
   ics.rf[i->dest_reg].f64 =
-      MIN(ics.rf[i->src1_reg].f64, ics.rf[i->src2_reg].f64);
+      std::min(ics.rf[i->src1_reg].f64, ics.rf[i->src2_reg].f64);
   return IA_NEXT;
 }
 uint32_t IntCode_MIN_V128_V128(IntCodeState& ics, const IntCode* i) {
@@ -1748,7 +1748,7 @@ uint32_t IntCode_MIN_V128_V128(IntCodeState& ics, const IntCode* i) {
   const vec128_t& src2 = ics.rf[i->src2_reg].v128;
   vec128_t& dest = ics.rf[i->dest_reg].v128;
   for (int n = 0; n < 4; n++) {
-    dest.f4[n] = MIN(src1.f4[n], src2.f4[n]);
+    dest.f4[n] = std::min(src1.f4[n], src2.f4[n]);
   }
   return IA_NEXT;
 }