[D3D12] ROV: Use MSAA instead of SSAA

src/xenia/gpu/d3d12/d3d12_command_processor.cc

@@ -28,10 +28,11 @@
 // may be blurry or have texture sampling artifacts, in this case the user may
 // disable half-pixel offset by setting this to false.
 DEFINE_bool(d3d12_half_pixel_offset, true,
-            "Enable half-pixel vertex and VPOS offset");
+            "Enable half-pixel vertex and VPOS offset.");
-// Disabled because the current positions look worse than sampling at centers.
 DEFINE_bool(d3d12_programmable_sample_positions, false,
-            "Enable custom SSAA sample positions where available");
+            "Enable custom SSAA sample positions for the RTV/DSV rendering "
+            "path where available instead of centers (experimental, not very "
+            "high-quality).");
 DEFINE_bool(d3d12_rov, true,
             "Use rasterizer-ordered views for render target emulation where "
             "available.");
@@ -538,7 +539,12 @@ void D3D12CommandProcessor::SetSamplePositions(MsaaSamples sample_positions) {
   if (current_sample_positions_ == sample_positions) {
     return;
   }
-  if (FLAGS_d3d12_programmable_sample_positions) {
+  // Evaluating attributes by sample index - which is done for per-sample
+  // depth - is undefined with programmable sample positions, so can't use them
+  // for ROV output. There's hardly any difference between 2,6 (of 0 and 3 with
+  // 4x MSAA) and 4,4 anyway.
+  // https://docs.microsoft.com/en-us/windows/desktop/api/d3d12/nf-d3d12-id3d12graphicscommandlist1-setsamplepositions
+  if (FLAGS_d3d12_programmable_sample_positions && !IsROVUsedForEDRAM()) {
     auto provider = GetD3D12Context()->GetD3D12Provider();
     auto tier = provider->GetProgrammableSamplePositionsTier();
     auto command_list = GetCurrentCommandList1();
@@ -1222,6 +1228,7 @@ bool D3D12CommandProcessor::IssueDraw(PrimitiveType primitive_type,
 
   // Update system constants before uploading them.
   UpdateSystemConstantValues(
+      primitive_type,
       indexed ? index_buffer_info->endianness : Endian::kUnspecified,
       color_mask, pipeline_render_targets);
 
@@ -1477,11 +1484,17 @@ void D3D12CommandProcessor::UpdateFixedFunctionState(
   }
 
   // Supersampling replacing multisampling due to difficulties of emulating
-  // EDRAM with multisampling.
+  // EDRAM with multisampling with RTV/DSV (with ROV, there's MSAA).
+  uint32_t ssaa_scale_x, ssaa_scale_y;
+  if (IsROVUsedForEDRAM()) {
+    ssaa_scale_x = 1;
+    ssaa_scale_y = 1;
+  } else {
     MsaaSamples msaa_samples =
         MsaaSamples((regs[XE_GPU_REG_RB_SURFACE_INFO].u32 >> 16) & 0x3);
-  uint32_t ssaa_scale_x = msaa_samples >= MsaaSamples::k4X ? 2 : 1;
+    ssaa_scale_x = msaa_samples >= MsaaSamples::k4X ? 2 : 1;
-  uint32_t ssaa_scale_y = msaa_samples >= MsaaSamples::k2X ? 2 : 1;
+    ssaa_scale_y = msaa_samples >= MsaaSamples::k2X ? 2 : 1;
+  }
 
   // Viewport.
   // PA_CL_VTE_CNTL contains whether offsets and scales are enabled.
@@ -1607,7 +1620,7 @@ void D3D12CommandProcessor::UpdateFixedFunctionState(
 }
 
 void D3D12CommandProcessor::UpdateSystemConstantValues(
-    Endian index_endian, uint32_t color_mask,
+    PrimitiveType primitive_type, Endian index_endian, uint32_t color_mask,
     const RenderTargetCache::PipelineRenderTarget render_targets[4]) {
   auto& regs = *register_file_;
 
@@ -1629,6 +1642,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
   uint32_t rb_surface_info = regs[XE_GPU_REG_RB_SURFACE_INFO].u32;
   uint32_t rb_colorcontrol = regs[XE_GPU_REG_RB_COLORCONTROL].u32;
   uint32_t rb_alpha_ref = regs[XE_GPU_REG_RB_ALPHA_REF].u32;
+  uint32_t pa_su_sc_mode_cntl = regs[XE_GPU_REG_PA_SU_SC_MODE_CNTL].u32;
 
   // Get the color info register values for each render target, and also put
   // some safety measures for the ROV path - disable fully aliased render
@@ -1695,6 +1709,11 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
     }
   }
 
+  // Get viewport Z scale - needed for flags and ROV output.
+  float viewport_scale_z = (pa_cl_vte_cntl & (1 << 4))
+                               ? regs[XE_GPU_REG_PA_CL_VPORT_ZSCALE].f32
+                               : 1.0f;
+
   bool dirty = false;
 
   // Flags.
@@ -1717,8 +1736,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
     flags |= DxbcShaderTranslator::kSysFlag_WNotReciprocal;
   }
   // Reversed depth.
-  if ((pa_cl_vte_cntl & (1 << 4)) &&
+  if (viewport_scale_z < 0.0f) {
-      regs[XE_GPU_REG_PA_CL_VPORT_ZSCALE].f32 < 0.0f) {
     flags |= DxbcShaderTranslator::kSysFlag_ReverseZ;
   }
   // Gamma writing.
@@ -1880,14 +1898,15 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
   dirty |= system_constants_.pixel_pos_reg != pixel_pos_reg;
   system_constants_.pixel_pos_reg = pixel_pos_reg;
 
-  // Supersampling anti-aliasing pixel scale inverse for pixel positions.
+  // Log2 of sample count, for scaling VPOS with SSAA (without ROV) and for
+  // EDRAM address calculation with MSAA (with ROV).
   MsaaSamples msaa_samples = MsaaSamples((rb_surface_info >> 16) & 0x3);
-  float ssaa_inv_scale_x = msaa_samples >= MsaaSamples::k4X ? 0.5f : 1.0f;
+  uint32_t sample_count_log2_x = msaa_samples >= MsaaSamples::k4X ? 1 : 0;
-  float ssaa_inv_scale_y = msaa_samples >= MsaaSamples::k2X ? 0.5f : 1.0f;
+  uint32_t sample_count_log2_y = msaa_samples >= MsaaSamples::k2X ? 1 : 0;
-  dirty |= system_constants_.ssaa_inv_scale[0] != ssaa_inv_scale_x;
+  dirty |= system_constants_.sample_count_log2[0] != sample_count_log2_x;
-  dirty |= system_constants_.ssaa_inv_scale[1] != ssaa_inv_scale_y;
+  dirty |= system_constants_.sample_count_log2[1] != sample_count_log2_y;
-  system_constants_.ssaa_inv_scale[0] = ssaa_inv_scale_x;
+  system_constants_.sample_count_log2[0] = sample_count_log2_x;
-  system_constants_.ssaa_inv_scale[1] = ssaa_inv_scale_y;
+  system_constants_.sample_count_log2[1] = sample_count_log2_y;
 
   // Alpha test.
   int32_t alpha_test;
@@ -2028,6 +2047,76 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
     dirty |= system_constants_.edram_depth_base_dwords != depth_base_dwords;
     system_constants_.edram_depth_base_dwords = depth_base_dwords;
 
+    // The Z range is reversed in the vertex shader if it's reverse - use the
+    // absolute value of the scale.
+    float depth_range_scale = std::abs(viewport_scale_z);
+    dirty |= system_constants_.edram_depth_range_scale != depth_range_scale;
+    system_constants_.edram_depth_range_scale = depth_range_scale;
+    float depth_range_offset = (pa_cl_vte_cntl & (1 << 5))
+                                   ? regs[XE_GPU_REG_PA_CL_VPORT_ZOFFSET].f32
+                                   : 0.0f;
+    if (viewport_scale_z < 0.0f) {
+      // Similar to MinDepth in fixed-function viewport calculation.
+      depth_range_offset += viewport_scale_z;
+    }
+    dirty |= system_constants_.edram_depth_range_offset != depth_range_offset;
+    system_constants_.edram_depth_range_offset = depth_range_offset;
+
+    // For points and lines, front polygon offset is used, and it's enabled if
+    // POLY_OFFSET_PARA_ENABLED is set, for polygons, separate front and back
+    // are used.
+    float poly_offset_front_scale = 0.0f, poly_offset_front_offset = 0.0f;
+    float poly_offset_back_scale = 0.0f, poly_offset_back_offset = 0.0f;
+    if (primitive_type == PrimitiveType::kPointList ||
+        primitive_type == PrimitiveType::kLineList ||
+        primitive_type == PrimitiveType::kLineStrip ||
+        primitive_type == PrimitiveType::kLineLoop ||
+        primitive_type == PrimitiveType::k2DLineStrip) {
+      if (pa_su_sc_mode_cntl & (1 << 13)) {
+        poly_offset_front_scale =
+            regs[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_SCALE].f32;
+        poly_offset_front_offset =
+            regs[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_OFFSET].f32;
+        poly_offset_back_scale = poly_offset_front_scale;
+        poly_offset_back_offset = poly_offset_front_offset;
+      }
+    } else {
+      if (pa_su_sc_mode_cntl & (1 << 11)) {
+        poly_offset_front_scale =
+            regs[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_SCALE].f32;
+        poly_offset_front_offset =
+            regs[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_OFFSET].f32;
+      }
+      if (pa_su_sc_mode_cntl & (1 << 12)) {
+        poly_offset_back_scale =
+            regs[XE_GPU_REG_PA_SU_POLY_OFFSET_BACK_SCALE].f32;
+        poly_offset_back_offset =
+            regs[XE_GPU_REG_PA_SU_POLY_OFFSET_BACK_OFFSET].f32;
+      }
+    }
+    if (viewport_scale_z < 0.0f) {
+      // Clip space flipped in the vertex shader, so flip polygon offset too.
+      poly_offset_front_scale = -poly_offset_front_scale;
+      poly_offset_front_offset = -poly_offset_front_offset;
+      poly_offset_back_scale = -poly_offset_back_scale;
+      poly_offset_back_offset = -poly_offset_back_offset;
+    }
+    // See PipelineCache for explanation.
+    poly_offset_front_scale *= 1.0f / 16.0f;
+    poly_offset_back_scale *= 1.0f / 16.0f;
+    dirty |= system_constants_.edram_poly_offset_front_scale !=
+             poly_offset_front_scale;
+    system_constants_.edram_poly_offset_front_scale = poly_offset_front_scale;
+    dirty |= system_constants_.edram_poly_offset_front_offset !=
+             poly_offset_front_offset;
+    system_constants_.edram_poly_offset_front_offset = poly_offset_front_offset;
+    dirty |= system_constants_.edram_poly_offset_back_scale !=
+             poly_offset_back_scale;
+    system_constants_.edram_poly_offset_back_scale = poly_offset_back_scale;
+    dirty |= system_constants_.edram_poly_offset_back_offset !=
+             poly_offset_back_offset;
+    system_constants_.edram_poly_offset_back_offset = poly_offset_back_offset;
+
     if (rb_depthcontrol & 0x1) {
       uint32_t stencil_value;
 

src/xenia/gpu/d3d12/d3d12_command_processor.h

@@ -197,7 +197,7 @@ class D3D12CommandProcessor : public CommandProcessor {
 
   void UpdateFixedFunctionState(ID3D12GraphicsCommandList* command_list);
   void UpdateSystemConstantValues(
-      Endian index_endian, uint32_t color_mask,
+      PrimitiveType primitive_type, Endian index_endian, uint32_t color_mask,
       const RenderTargetCache::PipelineRenderTarget render_targets[4]);
   bool UpdateBindings(ID3D12GraphicsCommandList* command_list,
                       const D3D12Shader* vertex_shader,

src/xenia/gpu/d3d12/pipeline_cache.cc

@@ -531,13 +531,15 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizerState(
   // the D3D12 command processor will drop such draw early.
   bool fill_mode_wireframe = false;
   float poly_offset = 0.0f, poly_offset_scale = 0.0f;
+  // With ROV, the depth bias is applied in the pixel shader because per-sample
+  // depth is needed for MSAA.
   if (!(cull_mode & 1)) {
     // Front faces aren't culled.
     uint32_t fill_mode = (pa_su_sc_mode_cntl >> 5) & 0x7;
     if (fill_mode == 0 || fill_mode == 1) {
       fill_mode_wireframe = true;
     }
-    if ((pa_su_sc_mode_cntl >> 11) & 0x1) {
+    if (!edram_rov_used_ && ((pa_su_sc_mode_cntl >> 11) & 0x1)) {
       poly_offset =
           register_file_->values[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_OFFSET].f32;
       poly_offset_scale =
@@ -550,27 +552,29 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizerState(
     if (fill_mode == 0 || fill_mode == 1) {
       fill_mode_wireframe = true;
     }
-    // Prefer front depth bias because in general, front faces are the ones that
+    // Prefer front depth bias because in general, front faces are the ones
-    // are rendered (except for shadow volumes).
+    // that are rendered (except for shadow volumes).
-    if (((pa_su_sc_mode_cntl >> 12) & 0x1) && poly_offset == 0.0f &&
+    if (!edram_rov_used_ && ((pa_su_sc_mode_cntl >> 12) & 0x1) &&
-        poly_offset_scale == 0.0f) {
+        poly_offset == 0.0f && poly_offset_scale == 0.0f) {
       poly_offset =
           register_file_->values[XE_GPU_REG_PA_SU_POLY_OFFSET_BACK_OFFSET].f32;
       poly_offset_scale =
           register_file_->values[XE_GPU_REG_PA_SU_POLY_OFFSET_BACK_SCALE].f32;
     }
   }
+  if (!edram_rov_used_) {
     // Conversion based on the calculations in Call of Duty 4 and the values it
     // writes to the registers, and also on:
     // https://github.com/mesa3d/mesa/blob/54ad9b444c8e73da498211870e785239ad3ff1aa/src/gallium/drivers/radeonsi/si_state.c#L943
-  // Dividing the scale by 2 - Call of Duty 4 sets the constant bias of 1/32768
+    // Dividing the scale by 2 - Call of Duty 4 sets the constant bias of
-  // for decals, however, it's done in two steps in separate places: first it's
+    // 1/32768 for decals, however, it's done in two steps in separate places:
-  // divided by 65536, and then it's multiplied by 2 (which is consistent with
+    // first it's divided by 65536, and then it's multiplied by 2 (which is
-  // what si_create_rs_state does, which multiplies the offset by 2 if it comes
+    // consistent with what si_create_rs_state does, which multiplies the offset
-  // from a non-D3D9 API for 24-bit depth buffers) - and multiplying by 2 to the
+    // by 2 if it comes from a non-D3D9 API for 24-bit depth buffers) - and
-  // number of significand bits. Tested mostly in Call of Duty 4 (vehicledamage
+    // multiplying by 2 to the number of significand bits. Tested mostly in Call
-  // map explosion decals) and Red Dead Redemption (shadows - 2^17 is not
+    // of Duty 4 (vehicledamage map explosion decals) and Red Dead Redemption
-  // enough, 2^18 hasn't been tested, but 2^19 eliminates the acne).
+    // (shadows - 2^17 is not enough, 2^18 hasn't been tested, but 2^19
+    // eliminates the acne).
     if (((register_file_->values[XE_GPU_REG_RB_DEPTH_INFO].u32 >> 16) & 0x1) ==
         uint32_t(DepthRenderTargetFormat::kD24FS8)) {
       poly_offset *= float(1 << 19);
@@ -584,6 +588,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizerState(
       poly_offset = -poly_offset;
       poly_offset_scale = -poly_offset_scale;
     }
+  }
   if (((pa_su_sc_mode_cntl >> 3) & 0x3) == 0) {
     // Fill mode is disabled.
     fill_mode_wireframe = false;
@@ -609,6 +614,14 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizerState(
   // Disable rendering in command processor if regs.pa_cl_clip_cntl & (1 << 22)?
   dirty |= regs.depth_clamp_enable != depth_clamp_enable;
   regs.depth_clamp_enable = depth_clamp_enable;
+  bool msaa_rov = false;
+  if (edram_rov_used_) {
+    if ((register_file_->values[XE_GPU_REG_RB_SURFACE_INFO].u32 >> 16) & 0x3) {
+      msaa_rov = true;
+    }
+    dirty |= regs.msaa_rov != msaa_rov;
+    regs.msaa_rov = msaa_rov;
+  }
   XXH64_update(&hash_state_, &regs, sizeof(regs));
   if (!dirty) {
     return UpdateStatus::kCompatible;
@@ -636,7 +649,15 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizerState(
       poly_offset_scale * (1.0f / 16.0f);
   update_desc_.RasterizerState.DepthClipEnable =
       !depth_clamp_enable ? TRUE : FALSE;
-  update_desc_.RasterizerState.ForcedSampleCount = edram_rov_used_ ? 1 : 0;
+  if (edram_rov_used_) {
+    // Only 1, 4, 8 and (not on all GPUs) 16 are allowed, using sample 0 as 0
+    // and 3 as 1 for 2x instead (not exactly the same sample positions, but
+    // still top-left and bottom-right - however, this can be adjusted with
+    // programmable sample positions).
+    update_desc_.RasterizerState.ForcedSampleCount = msaa_rov ? 4 : 1;
+  } else {
+    update_desc_.RasterizerState.ForcedSampleCount = 0;
+  }
 
   return UpdateStatus::kMismatch;
 }

src/xenia/gpu/d3d12/pipeline_cache.h

@@ -152,6 +152,7 @@ class PipelineCache {
     bool fill_mode_wireframe;
     bool front_counter_clockwise;
     bool depth_clamp_enable;
+    bool msaa_rov;
 
     UpdateRasterizerStateRegisters() { Reset(); }
     void Reset() { std::memset(this, 0, sizeof(*this)); }

src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.txt

@@ -24,30 +24,34 @@
 //   uint xe_edram_depth_base_dwords;   // Offset:   92 Size:     4 [unused]
 //   float4 xe_color_exp_bias;          // Offset:   96 Size:    16 [unused]
 //   uint4 xe_color_output_map;         // Offset:  112 Size:    16 [unused]
-//   uint xe_edram_stencil_reference;   // Offset:  128 Size:     4 [unused]
+//   float2 xe_edram_depth_range;       // Offset:  128 Size:     8 [unused]
-//   uint xe_edram_stencil_read_mask;   // Offset:  132 Size:     4 [unused]
+//   float2 xe_edram_poly_offset_front; // Offset:  136 Size:     8 [unused]
-//   uint xe_edram_stencil_write_mask;  // Offset:  136 Size:     4 [unused]
+//   float2 xe_edram_poly_offset_back;  // Offset:  144 Size:     8 [unused]
-//   uint4 xe_edram_stencil_front;      // Offset:  144 Size:    16 [unused]
+//   float2 xe_system_constant_padding_9;// Offset:  152 Size:     8 [unused]
-//   uint4 xe_edram_stencil_back;       // Offset:  160 Size:    16 [unused]
+//   uint xe_edram_stencil_reference;   // Offset:  160 Size:     4 [unused]
-//   uint4 xe_edram_base_dwords;        // Offset:  176 Size:    16 [unused]
+//   uint xe_edram_stencil_read_mask;   // Offset:  164 Size:     4 [unused]
-//   uint4 xe_edram_rt_flags;           // Offset:  192 Size:    16 [unused]
+//   uint xe_edram_stencil_write_mask;  // Offset:  168 Size:     4 [unused]
-//   uint4 xe_edram_rt_pack_width_low;  // Offset:  208 Size:    16 [unused]
+//   uint4 xe_edram_stencil_front;      // Offset:  176 Size:    16 [unused]
-//   uint4 xe_edram_rt_pack_offset_low; // Offset:  224 Size:    16 [unused]
+//   uint4 xe_edram_stencil_back;       // Offset:  192 Size:    16 [unused]
-//   uint4 xe_edram_rt_pack_width_high; // Offset:  240 Size:    16 [unused]
+//   uint4 xe_edram_base_dwords;        // Offset:  208 Size:    16 [unused]
-//   uint4 xe_edram_rt_pack_offset_high;// Offset:  256 Size:    16 [unused]
+//   uint4 xe_edram_rt_flags;           // Offset:  224 Size:    16 [unused]
-//   uint4 xe_edram_load_mask_rt01;     // Offset:  272 Size:    16 [unused]
+//   uint4 xe_edram_rt_pack_width_low;  // Offset:  240 Size:    16 [unused]
-//   uint4 xe_edram_load_mask_rt23;     // Offset:  288 Size:    16 [unused]
+//   uint4 xe_edram_rt_pack_offset_low; // Offset:  256 Size:    16 [unused]
-//   float4 xe_edram_load_scale_rt01;   // Offset:  304 Size:    16 [unused]
+//   uint4 xe_edram_rt_pack_width_high; // Offset:  272 Size:    16 [unused]
-//   float4 xe_edram_load_scale_rt23;   // Offset:  320 Size:    16 [unused]
+//   uint4 xe_edram_rt_pack_offset_high;// Offset:  288 Size:    16 [unused]
-//   uint4 xe_edram_blend_rt01;         // Offset:  336 Size:    16 [unused]
+//   uint4 xe_edram_load_mask_rt01;     // Offset:  304 Size:    16 [unused]
-//   uint4 xe_edram_blend_rt23;         // Offset:  352 Size:    16 [unused]
+//   uint4 xe_edram_load_mask_rt23;     // Offset:  320 Size:    16 [unused]
-//   float4 xe_edram_blend_constant;    // Offset:  368 Size:    16 [unused]
+//   float4 xe_edram_load_scale_rt01;   // Offset:  336 Size:    16 [unused]
-//   float4 xe_edram_store_min_rt01;    // Offset:  384 Size:    16 [unused]
+//   float4 xe_edram_load_scale_rt23;   // Offset:  352 Size:    16 [unused]
-//   float4 xe_edram_store_min_rt23;    // Offset:  400 Size:    16 [unused]
+//   uint4 xe_edram_blend_rt01;         // Offset:  368 Size:    16 [unused]
-//   float4 xe_edram_store_max_rt01;    // Offset:  416 Size:    16 [unused]
+//   uint4 xe_edram_blend_rt23;         // Offset:  384 Size:    16 [unused]
-//   float4 xe_edram_store_max_rt23;    // Offset:  432 Size:    16 [unused]
+//   float4 xe_edram_blend_constant;    // Offset:  400 Size:    16 [unused]
-//   float4 xe_edram_store_scale_rt01;  // Offset:  448 Size:    16 [unused]
+//   float4 xe_edram_store_min_rt01;    // Offset:  416 Size:    16 [unused]
-//   float4 xe_edram_store_scale_rt23;  // Offset:  464 Size:    16 [unused]
+//   float4 xe_edram_store_min_rt23;    // Offset:  432 Size:    16 [unused]
+//   float4 xe_edram_store_max_rt01;    // Offset:  448 Size:    16 [unused]
+//   float4 xe_edram_store_max_rt23;    // Offset:  464 Size:    16 [unused]
+//   float4 xe_edram_store_scale_rt01;  // Offset:  480 Size:    16 [unused]
+//   float4 xe_edram_store_scale_rt23;  // Offset:  496 Size:    16 [unused]
 //
 // }
 //
@@ -81,7 +85,8 @@
 // TEXCOORD                14   xyzw       14     NONE   float   xyzw
 // TEXCOORD                15   xyzw       15     NONE   float   xyzw
 // TEXCOORD                16   xyz        16     NONE   float     z 
-// SV_Position              0   xyzw       17      POS   float   xyzw
+// TEXCOORD                17   xy         17     NONE   float   xy  
+// SV_Position              0   xyzw       18      POS   float   xyzw
 //
 //
 // Output signature:
@@ -105,7 +110,8 @@
 // TEXCOORD                14   xyzw       14     NONE   float   xyzw
 // TEXCOORD                15   xyzw       15     NONE   float   xyzw
 // TEXCOORD                16   xyz        16     NONE   float   xyz 
-// SV_Position              0   xyzw       17      POS   float   xyzw
+// TEXCOORD                17   xy         17     NONE   float   xy  
+// SV_Position              0   xyzw       18      POS   float   xyzw
 //
 gs_5_1
 dcl_globalFlags refactoringAllowed
@@ -127,7 +133,8 @@ dcl_input v[1][13].xyzw
 dcl_input v[1][14].xyzw
 dcl_input v[1][15].xyzw
 dcl_input v[1][16].xyz
-dcl_input_siv v[1][17].xyzw, position
+dcl_input v[1][17].xy
+dcl_input_siv v[1][18].xyzw, position
 dcl_temps 2
 dcl_inputprimitive point 
 dcl_stream m0
@@ -149,15 +156,16 @@ dcl_output o13.xyzw
 dcl_output o14.xyzw
 dcl_output o15.xyzw
 dcl_output o16.xyz
-dcl_output_siv o17.xyzw, position
+dcl_output o17.xy
+dcl_output_siv o18.xyzw, position
 dcl_maxout 4
 lt r0.x, l(0.000000), v[0][16].z
 movc r0.xy, r0.xxxx, v[0][16].zzzz, CB0[0][3].xyxx
 max r0.xy, r0.xyxx, CB0[0][3].zzzz
 min r0.xy, r0.xyxx, CB0[0][3].wwww
 mul r0.xy, r0.xyxx, CB0[0][4].xyxx
-mul r0.zw, r0.xxxy, v[0][17].wwww
+mul r0.zw, r0.xxxy, v[0][18].wwww
-mad r1.xyzw, r0.zwzw, l(-1.000000, 1.000000, 1.000000, -1.000000), v[0][17].xyxy
+mad r1.xyzw, r0.zwzw, l(-1.000000, 1.000000, 1.000000, -1.000000), v[0][18].xyxy
 mov o0.xyzw, v[0][0].xyzw
 mov o1.xyzw, v[0][1].xyzw
 mov o2.xyzw, v[0][2].xyzw
@@ -176,10 +184,11 @@ mov o14.xyzw, v[0][14].xyzw
 mov o15.xyzw, v[0][15].xyzw
 mov o16.xy, l(0,1.000000,0,0)
 mov o16.z, v[0][16].z
-mov o17.xy, r1.xyxx
+mov o17.xy, v[0][17].xyxx
-mov o17.zw, v[0][17].zzzw
+mov o18.xy, r1.xyxx
+mov o18.zw, v[0][18].zzzw
 emit_stream m0
-mad r0.zw, r0.xxxy, v[0][17].wwww, v[0][17].xxxy
+mad r0.zw, r0.xxxy, v[0][18].wwww, v[0][18].xxxy
 mov o0.xyzw, v[0][0].xyzw
 mov o1.xyzw, v[0][1].xyzw
 mov o2.xyzw, v[0][2].xyzw
@@ -198,10 +207,11 @@ mov o14.xyzw, v[0][14].xyzw
 mov o15.xyzw, v[0][15].xyzw
 mov o16.xy, l(1.000000,1.000000,0,0)
 mov o16.z, v[0][16].z
-mov o17.xy, r0.zwzz
+mov o17.xy, v[0][17].xyxx
-mov o17.zw, v[0][17].zzzw
+mov o18.xy, r0.zwzz
+mov o18.zw, v[0][18].zzzw
 emit_stream m0
-mad r0.xy, -r0.xyxx, v[0][17].wwww, v[0][17].xyxx
+mad r0.xy, -r0.xyxx, v[0][18].wwww, v[0][18].xyxx
 mov o0.xyzw, v[0][0].xyzw
 mov o1.xyzw, v[0][1].xyzw
 mov o2.xyzw, v[0][2].xyzw
@@ -220,8 +230,9 @@ mov o14.xyzw, v[0][14].xyzw
 mov o15.xyzw, v[0][15].xyzw
 mov o16.xy, l(0,0,0,0)
 mov o16.z, v[0][16].z
-mov o17.xy, r0.xyxx
+mov o17.xy, v[0][17].xyxx
-mov o17.zw, v[0][17].zzzw
+mov o18.xy, r0.xyxx
+mov o18.zw, v[0][18].zzzw
 emit_stream m0
 mov o0.xyzw, v[0][0].xyzw
 mov o1.xyzw, v[0][1].xyzw
@@ -241,9 +252,10 @@ mov o14.xyzw, v[0][14].xyzw
 mov o15.xyzw, v[0][15].xyzw
 mov o16.xy, l(1.000000,0,0,0)
 mov o16.z, v[0][16].z
-mov o17.xy, r1.zwzz
+mov o17.xy, v[0][17].xyxx
-mov o17.zw, v[0][17].zzzw
+mov o18.xy, r1.zwzz
+mov o18.zw, v[0][18].zzzw
 emit_stream m0
 cut_stream m0
 ret 
-// Approximately 95 instruction slots used
+// Approximately 99 instruction slots used

src/xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.h

@@ -1,11 +1,11 @@
 // generated from `xb buildhlsl`
 // source: primitive_quad_list.gs.hlsl
 const uint8_t primitive_quad_list_gs[] = {
-    0x44, 0x58, 0x42, 0x43, 0xCE, 0x07, 0x99, 0xBE, 0xAA, 0xB9, 0xA8, 0xDC,
+    0x44, 0x58, 0x42, 0x43, 0xD8, 0xFB, 0x31, 0x6C, 0x66, 0x43, 0xA6, 0xA0,
-    0x6E, 0x46, 0xC9, 0xF7, 0x72, 0x0B, 0xFF, 0xF2, 0x01, 0x00, 0x00, 0x00,
+    0xB4, 0xC1, 0x38, 0x67, 0x9A, 0x79, 0x2C, 0xDB, 0x01, 0x00, 0x00, 0x00,
-    0x64, 0x0E, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00,
+    0x14, 0x0F, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00,
-    0xA0, 0x00, 0x00, 0x00, 0x78, 0x02, 0x00, 0x00, 0x98, 0x04, 0x00, 0x00,
+    0xA0, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0xCC, 0x04, 0x00, 0x00,
-    0xC8, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00,
+    0x78, 0x0E, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x47, 0x00, 0x05, 0x00, 0x00,
     0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00,
@@ -14,298 +14,313 @@ const uint8_t primitive_quad_list_gs[] = {
     0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, 0x74, 0x20, 0x28, 0x52,
     0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, 0x68, 0x61, 0x64, 0x65,
     0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, 0x65, 0x72, 0x20, 0x31,
-    0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0xD0, 0x01, 0x00, 0x00,
+    0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0xE8, 0x01, 0x00, 0x00,
-    0x12, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x13, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x01, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x01, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x02, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x03, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x03, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x04, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x04, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x05, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x05, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x06, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x06, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x07, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x07, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x08, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x08, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x09, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x09, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x0A, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x0A, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x0B, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x0B, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x0C, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x0C, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x0D, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x0D, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x0E, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x0E, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x0F, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xB8, 0x01, 0x00, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
     0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x10, 0x00, 0x00, 0x00, 0x07, 0x07, 0x00, 0x00, 0xC1, 0x01, 0x00, 0x00,
+    0x10, 0x00, 0x00, 0x00, 0x07, 0x07, 0x00, 0x00, 0xD0, 0x01, 0x00, 0x00,
+    0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+    0x11, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0xD9, 0x01, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x11, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x54, 0x45, 0x58, 0x43,
+    0x12, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x54, 0x45, 0x58, 0x43,
     0x4F, 0x4F, 0x52, 0x44, 0x00, 0x53, 0x56, 0x5F, 0x50, 0x6F, 0x73, 0x69,
     0x74, 0x69, 0x6F, 0x6E, 0x00, 0xAB, 0xAB, 0xAB, 0x4F, 0x53, 0x47, 0x35,
-    0x18, 0x02, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+    0x34, 0x02, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00,
     0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
     0x01, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x02, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x1C, 0x02, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00,
     0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
     0x04, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x1C, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x03, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
-    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00,
     0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
     0x07, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x02, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x1C, 0x02, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x03, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00,
-    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00,
     0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
     0x0A, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x02, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x1C, 0x02, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x03, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00,
-    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x02, 0x00, 0x00,
     0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
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+    0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x09, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x03, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x09, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x0A, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x03, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x0A, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x0B, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x03, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x0B, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0x72, 0x20, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x12, 0x20, 0x00,
+    0x0C, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x03, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x0D, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0x03, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x75, 0x00, 0x00, 0x03,
+    0x0D, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x0E, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x0E, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x0F, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0x72, 0x20, 0x10, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x10, 0x00, 0x00, 0x00, 0x46, 0x12, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0x32, 0x20, 0x10, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x11, 0x00, 0x00, 0x00, 0x46, 0x10, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x11, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x12, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x12, 0x00, 0x00, 0x00, 0x75, 0x00, 0x00, 0x03, 0x00, 0x00, 0x11, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x01, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x01, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x02, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x02, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x03, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x03, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x04, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x04, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x05, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x05, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x06, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x06, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x07, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x08, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x09, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x09, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x0A, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x0A, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0x72, 0x20, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x12, 0x20, 0x00,
+    0x0B, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06,
+    0x0B, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0xF2, 0x20, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00,
+    0x0C, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x02, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x75, 0x00, 0x00, 0x03,
+    0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0x00, 0x00, 0x03,
+    0x0D, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01,
+    0x0D, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x00,
+    0x0E, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00,
+    0x0E, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
-    0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x0F, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0x72, 0x20, 0x10, 0x00,
+    0x10, 0x00, 0x00, 0x00, 0x46, 0x12, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
+    0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0x32, 0x20, 0x10, 0x00,
+    0x11, 0x00, 0x00, 0x00, 0x46, 0x10, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
+    0x11, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x06, 0xF2, 0x20, 0x10, 0x00,
+    0x12, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x20, 0x00, 0x02, 0x00, 0x00, 0x00,
+    0x12, 0x00, 0x00, 0x00, 0x75, 0x00, 0x00, 0x03, 0x00, 0x00, 0x11, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x76, 0x00, 0x00, 0x03, 0x00, 0x00, 0x11, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54,
+    0x94, 0x00, 0x00, 0x00, 0x52, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-    0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-    0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x06, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 };

src/xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.txt

@@ -24,7 +24,8 @@
 // TEXCOORD                14   xyzw       14     NONE   float   xyzw
 // TEXCOORD                15   xyzw       15     NONE   float   xyzw
 // TEXCOORD                16   xyz        16     NONE   float   xyz 
-// SV_Position              0   xyzw       17      POS   float   xyzw
+// TEXCOORD                17   xy         17     NONE   float   xy  
+// SV_Position              0   xyzw       18      POS   float   xyzw
 //
 //
 // Output signature:
@@ -48,7 +49,8 @@
 // TEXCOORD                14   xyzw       14     NONE   float   xyzw
 // TEXCOORD                15   xyzw       15     NONE   float   xyzw
 // TEXCOORD                16   xyz        16     NONE   float   xyz 
-// SV_Position              0   xyzw       17      POS   float   xyzw
+// TEXCOORD                17   xy         17     NONE   float   xy  
+// SV_Position              0   xyzw       18      POS   float   xyzw
 //
 gs_5_1
 dcl_globalFlags refactoringAllowed
@@ -69,7 +71,8 @@ dcl_input v[4][13].xyzw
 dcl_input v[4][14].xyzw
 dcl_input v[4][15].xyzw
 dcl_input v[4][16].xyz
-dcl_input_siv v[4][17].xyzw, position
+dcl_input v[4][17].xy
+dcl_input_siv v[4][18].xyzw, position
 dcl_inputprimitive lineadj 
 dcl_stream m0
 dcl_outputtopology trianglestrip 
@@ -90,7 +93,8 @@ dcl_output o13.xyzw
 dcl_output o14.xyzw
 dcl_output o15.xyzw
 dcl_output o16.xyz
-dcl_output_siv o17.xyzw, position
+dcl_output o17.xy
+dcl_output_siv o18.xyzw, position
 dcl_maxout 4
 mov o0.xyzw, v[0][0].xyzw
 mov o1.xyzw, v[0][1].xyzw
@@ -109,7 +113,8 @@ mov o13.xyzw, v[0][13].xyzw
 mov o14.xyzw, v[0][14].xyzw
 mov o15.xyzw, v[0][15].xyzw
 mov o16.xyz, v[0][16].xyzx
-mov o17.xyzw, v[0][17].xyzw
+mov o17.xy, v[0][17].xyxx
+mov o18.xyzw, v[0][18].xyzw
 emit_stream m0
 mov o0.xyzw, v[1][0].xyzw
 mov o1.xyzw, v[1][1].xyzw
@@ -128,7 +133,8 @@ mov o13.xyzw, v[1][13].xyzw
 mov o14.xyzw, v[1][14].xyzw
 mov o15.xyzw, v[1][15].xyzw
 mov o16.xyz, v[1][16].xyzx
-mov o17.xyzw, v[1][17].xyzw
+mov o17.xy, v[1][17].xyxx
+mov o18.xyzw, v[1][18].xyzw
 emit_stream m0
 mov o0.xyzw, v[3][0].xyzw
 mov o1.xyzw, v[3][1].xyzw
@@ -147,7 +153,8 @@ mov o13.xyzw, v[3][13].xyzw
 mov o14.xyzw, v[3][14].xyzw
 mov o15.xyzw, v[3][15].xyzw
 mov o16.xyz, v[3][16].xyzx
-mov o17.xyzw, v[3][17].xyzw
+mov o17.xy, v[3][17].xyxx
+mov o18.xyzw, v[3][18].xyzw
 emit_stream m0
 mov o0.xyzw, v[2][0].xyzw
 mov o1.xyzw, v[2][1].xyzw
@@ -166,8 +173,9 @@ mov o13.xyzw, v[2][13].xyzw
 mov o14.xyzw, v[2][14].xyzw
 mov o15.xyzw, v[2][15].xyzw
 mov o16.xyz, v[2][16].xyzx
-mov o17.xyzw, v[2][17].xyzw
+mov o17.xy, v[2][17].xyxx
+mov o18.xyzw, v[2][18].xyzw
 emit_stream m0
 cut_stream m0
 ret 
-// Approximately 78 instruction slots used
+// Approximately 82 instruction slots used

src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.txt

@@ -24,7 +24,8 @@
 // TEXCOORD                14   xyzw       14     NONE   float   xyzw
 // TEXCOORD                15   xyzw       15     NONE   float   xyzw
 // TEXCOORD                16   xyz        16     NONE   float   xyz 
-// SV_Position              0   xyzw       17      POS   float   xyzw
+// TEXCOORD                17   xy         17     NONE   float   xy  
+// SV_Position              0   xyzw       18      POS   float   xyzw
 //
 //
 // Output signature:
@@ -48,7 +49,8 @@
 // TEXCOORD                14   xyzw       14     NONE   float   xyzw
 // TEXCOORD                15   xyzw       15     NONE   float   xyzw
 // TEXCOORD                16   xyz        16     NONE   float   xyz 
-// SV_Position              0   xyzw       17      POS   float   xyzw
+// TEXCOORD                17   xy         17     NONE   float   xy  
+// SV_Position              0   xyzw       18      POS   float   xyzw
 //
 gs_5_1
 dcl_globalFlags refactoringAllowed
@@ -69,7 +71,8 @@ dcl_input v[3][13].xyzw
 dcl_input v[3][14].xyzw
 dcl_input v[3][15].xyzw
 dcl_input v[3][16].xyz
-dcl_input_siv v[3][17].xyzw, position
+dcl_input v[3][17].xy
+dcl_input_siv v[3][18].xyzw, position
 dcl_temps 18
 dcl_inputprimitive triangle 
 dcl_stream m0
@@ -91,7 +94,8 @@ dcl_output o13.xyzw
 dcl_output o14.xyzw
 dcl_output o15.xyzw
 dcl_output o16.xyz
-dcl_output_siv o17.xyzw, position
+dcl_output o17.xy
+dcl_output_siv o18.xyzw, position
 dcl_maxout 6
 mov o0.xyzw, v[0][0].xyzw
 mov o1.xyzw, v[0][1].xyzw
@@ -110,7 +114,8 @@ mov o13.xyzw, v[0][13].xyzw
 mov o14.xyzw, v[0][14].xyzw
 mov o15.xyzw, v[0][15].xyzw
 mov o16.xyz, v[0][16].xyzx
-mov o17.xyzw, v[0][17].xyzw
+mov o17.xy, v[0][17].xyxx
+mov o18.xyzw, v[0][18].xyzw
 emit_stream m0
 mov o0.xyzw, v[1][0].xyzw
 mov o1.xyzw, v[1][1].xyzw
@@ -129,7 +134,8 @@ mov o13.xyzw, v[1][13].xyzw
 mov o14.xyzw, v[1][14].xyzw
 mov o15.xyzw, v[1][15].xyzw
 mov o16.xyz, v[1][16].xyzx
-mov o17.xyzw, v[1][17].xyzw
+mov o17.xy, v[1][17].xyxx
+mov o18.xyzw, v[1][18].xyzw
 emit_stream m0
 mov o0.xyzw, v[2][0].xyzw
 mov o1.xyzw, v[2][1].xyzw
@@ -148,12 +154,13 @@ mov o13.xyzw, v[2][13].xyzw
 mov o14.xyzw, v[2][14].xyzw
 mov o15.xyzw, v[2][15].xyzw
 mov o16.xyz, v[2][16].xyzx
-mov o17.xyzw, v[2][17].xyzw
+mov o17.xy, v[2][17].xyxx
+mov o18.xyzw, v[2][18].xyzw
 emit_stream m0
 cut_stream m0
-mov r0.xw, v[2][17].xxxy
+mov r0.xw, v[2][18].xxxy
-mov r0.yz, v[1][17].yyxy
+mov r0.yz, v[1][18].yyxy
-eq r0.xyzw, r0.xyzw, v[0][17].xyxy
+eq r0.xyzw, r0.xyzw, v[0][18].xyxy
 and r0.xy, r0.ywyy, r0.xzxx
 or r0.x, r0.y, r0.x
 if_nz r0.x
@@ -174,7 +181,8 @@ if_nz r0.x
   mov o14.xyzw, v[2][14].xyzw
   mov o15.xyzw, v[2][15].xyzw
   mov o16.xyz, v[2][16].xyzx
-  mov o17.xyzw, v[2][17].xyzw
+  mov o17.xy, v[2][17].xyxx
+  mov o18.xyzw, v[2][18].xyzw
   emit_stream m0
   mov o0.xyzw, v[1][0].xyzw
   mov o1.xyzw, v[1][1].xyzw
@@ -193,7 +201,8 @@ if_nz r0.x
   mov o14.xyzw, v[1][14].xyzw
   mov o15.xyzw, v[1][15].xyzw
   mov o16.xyz, v[1][16].xyzx
-  mov o17.xyzw, v[1][17].xyzw
+  mov o17.xy, v[1][17].xyxx
+  mov o18.xyzw, v[1][18].xyzw
   emit_stream m0
   add r0.xyzw, -v[0][0].xyzw, v[1][0].xyzw
   add r0.xyzw, r0.xyzw, v[2][0].xyzw
@@ -229,8 +238,8 @@ if_nz r0.x
   add r15.xyzw, r15.xyzw, v[2][15].xyzw
   add r16.xy, v[0][16].xyxx, v[1][16].xyxx
   add r16.xy, r16.xyxx, -v[2][16].xyxx
-  add r16.zw, -v[0][17].xxxy, v[1][17].xxxy
+  add r16.zw, -v[0][18].xxxy, v[1][18].xxxy
-  add r16.zw, r16.zzzw, v[2][17].xxxy
+  add r16.zw, r16.zzzw, v[2][18].xxxy
 else 
   mov o0.xyzw, v[0][0].xyzw
   mov o1.xyzw, v[0][1].xyzw
@@ -249,7 +258,8 @@ else
   mov o14.xyzw, v[0][14].xyzw
   mov o15.xyzw, v[0][15].xyzw
   mov o16.xyz, v[0][16].xyzx
-  mov o17.xyzw, v[0][17].xyzw
+  mov o17.xy, v[0][17].xyxx
+  mov o18.xyzw, v[0][18].xyzw
   emit_stream m0
   mov o0.xyzw, v[2][0].xyzw
   mov o1.xyzw, v[2][1].xyzw
@@ -268,7 +278,8 @@ else
   mov o14.xyzw, v[2][14].xyzw
   mov o15.xyzw, v[2][15].xyzw
   mov o16.xyz, v[2][16].xyzx
-  mov o17.xyzw, v[2][17].xyzw
+  mov o17.xy, v[2][17].xyxx
+  mov o18.xyzw, v[2][18].xyzw
   emit_stream m0
   add r17.xyzw, -v[1][0].xyzw, v[0][0].xyzw
   add r0.xyzw, r17.xyzw, v[2][0].xyzw
@@ -304,8 +315,8 @@ else
   add r15.xyzw, r17.xyzw, v[2][15].xyzw
   add r17.xy, v[1][16].xyxx, v[0][16].xyxx
   add r16.xy, r17.xyxx, -v[2][16].xyxx
-  add r17.xy, -v[1][17].xyxx, v[0][17].xyxx
+  add r17.xy, -v[1][18].xyxx, v[0][18].xyxx
-  add r16.zw, r17.xxxy, v[2][17].xxxy
+  add r16.zw, r17.xxxy, v[2][18].xxxy
 endif 
 mov o0.xyzw, r0.xyzw
 mov o1.xyzw, r1.xyzw
@@ -325,9 +336,10 @@ mov o14.xyzw, r14.xyzw
 mov o15.xyzw, r15.xyzw
 mov o16.xy, r16.xyxx
 mov o16.z, v[2][16].z
-mov o17.xy, r16.zwzz
+mov o17.xy, v[2][17].xyxx
-mov o17.zw, v[2][17].zzzw
+mov o18.xy, r16.zwzz
+mov o18.zw, v[2][18].zzzw
 emit_stream m0
 cut_stream m0
 ret 
-// Approximately 237 instruction slots used
+// Approximately 245 instruction slots used

src/xenia/gpu/d3d12/shaders/primitive_point_list.gs.hlsl

@@ -6,8 +6,9 @@
 void main(point XeVertex xe_in[1], inout TriangleStream<XeVertex> xe_stream) {
   XeVertex xe_out;
   xe_out.interpolators = xe_in[0].interpolators;
-  xe_out.position.zw = xe_in[0].position.zw;
   xe_out.point_params.z = xe_in[0].point_params.z;
+  xe_out.clip_space_zw = xe_in[0].clip_space_zw;
+  xe_out.position.zw = xe_in[0].position.zw;
 
   // Shader header writes -1.0f to point_size by default, so any positive value
   // means that it was overwritten by the translated vertex shader.

src/xenia/gpu/d3d12/shaders/primitive_rectangle_list.gs.hlsl

@@ -3,13 +3,14 @@
 [maxvertexcount(6)]
 void main(triangle XeVertex xe_in[3],
           inout TriangleStream<XeVertex> xe_stream) {
-  XeVertex xe_out;
-
   xe_stream.Append(xe_in[0]);
   xe_stream.Append(xe_in[1]);
   xe_stream.Append(xe_in[2]);
   xe_stream.RestartStrip();
 
+  XeVertex xe_out;
+  xe_out.point_params.z = xe_in[2].point_params.z;
+  xe_out.clip_space_zw = xe_in[2].clip_space_zw;
   // Most games use a left-aligned form.
   [branch] if (all(xe_in[0].position.xy ==
                    float2(xe_in[2].position.x, xe_in[1].position.y)) ||
@@ -61,7 +62,6 @@ void main(triangle XeVertex xe_in[3],
                              xe_in[2].position.xy,
                              xe_in[2].position.zw);
   }
-  xe_out.point_params.z = xe_in[2].point_params.z;
   xe_stream.Append(xe_out);
   xe_stream.RestartStrip();
 }

src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli

@@ -28,56 +28,63 @@ cbuffer xe_system_cbuffer : register(b0) {
   // vec4 7
   uint4 xe_color_output_map;
   // vec4 8
+  float2 xe_edram_depth_range;
+  float2 xe_edram_poly_offset_front;
+  // vec4 9
+  float2 xe_edram_poly_offset_back;
+  float2 xe_system_constant_padding_9;
+  // vec4 10
   uint xe_edram_stencil_reference;
   uint xe_edram_stencil_read_mask;
   uint xe_edram_stencil_write_mask;
-  // vec4 9
-  uint4 xe_edram_stencil_front;
-  // vec4 10
-  uint4 xe_edram_stencil_back;
   // vec4 11
-  uint4 xe_edram_base_dwords;
+  uint4 xe_edram_stencil_front;
   // vec4 12
-  uint4 xe_edram_rt_flags;
+  uint4 xe_edram_stencil_back;
   // vec4 13
-  uint4 xe_edram_rt_pack_width_low;
+  uint4 xe_edram_base_dwords;
   // vec4 14
-  uint4 xe_edram_rt_pack_offset_low;
+  uint4 xe_edram_rt_flags;
   // vec4 15
-  uint4 xe_edram_rt_pack_width_high;
+  uint4 xe_edram_rt_pack_width_low;
   // vec4 16
-  uint4 xe_edram_rt_pack_offset_high;
+  uint4 xe_edram_rt_pack_offset_low;
   // vec4 17
-  uint4 xe_edram_load_mask_rt01;
+  uint4 xe_edram_rt_pack_width_high;
   // vec4 18
-  uint4 xe_edram_load_mask_rt23;
+  uint4 xe_edram_rt_pack_offset_high;
   // vec4 19
-  float4 xe_edram_load_scale_rt01;
+  uint4 xe_edram_load_mask_rt01;
   // vec4 20
-  float4 xe_edram_load_scale_rt23;
+  uint4 xe_edram_load_mask_rt23;
   // vec4 21
-  uint4 xe_edram_blend_rt01;
+  float4 xe_edram_load_scale_rt01;
   // vec4 22
-  uint4 xe_edram_blend_rt23;
+  float4 xe_edram_load_scale_rt23;
   // vec4 23
-  float4 xe_edram_blend_constant;
+  uint4 xe_edram_blend_rt01;
   // vec4 24
-  float4 xe_edram_store_min_rt01;
+  uint4 xe_edram_blend_rt23;
   // vec4 25
-  float4 xe_edram_store_min_rt23;
+  float4 xe_edram_blend_constant;
   // vec4 26
-  float4 xe_edram_store_max_rt01;
+  float4 xe_edram_store_min_rt01;
   // vec4 27
-  float4 xe_edram_store_max_rt23;
+  float4 xe_edram_store_min_rt23;
   // vec4 28
-  float4 xe_edram_store_scale_rt01;
+  float4 xe_edram_store_max_rt01;
   // vec4 29
+  float4 xe_edram_store_max_rt23;
+  // vec4 30
+  float4 xe_edram_store_scale_rt01;
+  // vec4 31
   float4 xe_edram_store_scale_rt23;
 };
 
 struct XeVertex {
   float4 interpolators[16] : TEXCOORD0;
   float3 point_params : TEXCOORD16;
+  float2 clip_space_zw : TEXCOORD17;
   float4 position : SV_Position;
 };
 

src/xenia/gpu/dxbc_shader_translator.h

@@ -283,7 +283,10 @@ class DxbcShaderTranslator : public ShaderTranslator {
     // Inverse scale of the host viewport (but not supersampled), with signs
     // pre-applied.
     float point_screen_to_ndc[2];
-    float ssaa_inv_scale[2];
+    // Log2 of X and Y sample size. For SSAA with RTV/DSV, this is used to get
+    // VPOS to pass to the game's shader. For MSAA with ROV, this is used for
+    // EDRAM address calculation.
+    uint32_t sample_count_log2[2];
 
     // vec4 5
     // The range is floats as uints so it's easier to pass infinity.
@@ -298,12 +301,38 @@ class DxbcShaderTranslator : public ShaderTranslator {
     uint32_t color_output_map[4];
 
     // vec4 8
+    union {
+      struct {
+        float edram_depth_range_scale;
+        float edram_depth_range_offset;
+      };
+      float edram_depth_range[2];
+    };
+    union {
+      struct {
+        float edram_poly_offset_front_scale;
+        float edram_poly_offset_front_offset;
+      };
+      float edram_poly_offset_front[2];
+    };
+
+    // vec4 9
+    union {
+      struct {
+        float edram_poly_offset_back_scale;
+        float edram_poly_offset_back_offset;
+      };
+      float edram_poly_offset_back[2];
+    };
+    uint32_t padding_9[2];
+
+    // vec4 10
     uint32_t edram_stencil_reference;
     uint32_t edram_stencil_read_mask;
     uint32_t edram_stencil_write_mask;
-    uint32_t padding_8;
+    uint32_t padding_10;
 
-    // vec4 9
+    // vec4 11
     union {
       struct {
         // kStencilOp, separated into sub-operations - not the Xenos enum.
@@ -315,7 +344,7 @@ class DxbcShaderTranslator : public ShaderTranslator {
       uint32_t edram_stencil_front[4];
     };
 
-    // vec4 10
+    // vec4 12
     union {
       struct {
         // kStencilOp, separated into sub-operations - not the Xenos enum.
@@ -327,66 +356,66 @@ class DxbcShaderTranslator : public ShaderTranslator {
       uint32_t edram_stencil_back[4];
     };
 
-    // vec4 11
+    // vec4 13
     uint32_t edram_base_dwords[4];
 
-    // vec4 12
+    // vec4 14
     // Binding and format info flags.
     uint32_t edram_rt_flags[4];
 
-    // vec4 13
+    // vec4 15
     // Format info - widths of components in the lower 32 bits (for ibfe/bfi),
     // packed as 8:8:8:8 for each render target.
     uint32_t edram_rt_pack_width_low[4];
 
-    // vec4 14
+    // vec4 16
     // Format info - offsets of components in the lower 32 bits (for ibfe/bfi),
     // packed as 8:8:8:8 for each render target.
     uint32_t edram_rt_pack_offset_low[4];
 
-    // vec4 15
+    // vec4 17
     // Format info - widths of components in the upper 32 bits (for ibfe/bfi),
     // packed as 8:8:8:8 for each render target.
     uint32_t edram_rt_pack_width_high[4];
 
-    // vec4 16
+    // vec4 18
     // Format info - offsets of components in the upper 32 bits (for ibfe/bfi),
     // packed as 8:8:8:8 for each render target.
     uint32_t edram_rt_pack_offset_high[4];
 
-    // vec4 17:18
+    // vec4 19:20
     // Format info - mask of color and alpha after unpacking, but before float
     // conversion. Primarily to differentiate between signed and unsigned
     // formats because ibfe is used for both since k_16_16 and k_16_16_16_16 are
     // signed.
     uint32_t edram_load_mask_rt01_rt23[2][4];
 
-    // vec4 19:20
+    // vec4 21:22
     // Format info - scale to apply to the color and the alpha of each render
     // target after unpacking and converting.
     float edram_load_scale_rt01_rt23[2][4];
 
-    // vec4 21:22
+    // vec4 23:24
     // Render target blending options.
     uint32_t edram_blend_rt01_rt23[2][4];
 
-    // vec4 23
+    // vec4 25
     // The constant blend factor for the respective modes.
     float edram_blend_constant[4];
 
-    // vec4 24:25
+    // vec4 26:27
     // Format info - minimum color and alpha values (as float, before
     // conversion) writable to the each render target. Integer so it's easier to
     // write infinity.
     uint32_t edram_store_min_rt01_rt23[2][4];
 
-    // vec4 26:27
+    // vec4 28:29
     // Format info - maximum color and alpha values (as float, before
     // conversion) writable to the each render target. Integer so it's easier to
     // write infinity.
     uint32_t edram_store_max_rt01_rt23[2][4];
 
-    // vec4 28:29
+    // vec4 30:31
     // Format info - scale to apply to the color and the alpha of each render
     // target before converting and packing.
     float edram_store_scale_rt01_rt23[2][4];
@@ -513,12 +542,12 @@ class DxbcShaderTranslator : public ShaderTranslator {
     kSysConst_PointScreenToNDC_Index = kSysConst_PointSizeMinMax_Index + 1,
     kSysConst_PointScreenToNDC_Vec = kSysConst_PointSizeMinMax_Vec + 1,
     kSysConst_PointScreenToNDC_Comp = 0,
-    kSysConst_SSAAInvScale_Index = kSysConst_PointScreenToNDC_Index + 1,
+    kSysConst_SampleCountLog2_Index = kSysConst_PointScreenToNDC_Index + 1,
-    kSysConst_SSAAInvScale_Vec = kSysConst_PointScreenToNDC_Vec,
+    kSysConst_SampleCountLog2_Vec = kSysConst_PointScreenToNDC_Vec,
-    kSysConst_SSAAInvScale_Comp = 2,
+    kSysConst_SampleCountLog2_Comp = 2,
 
-    kSysConst_AlphaTestRange_Index = kSysConst_SSAAInvScale_Index + 1,
+    kSysConst_AlphaTestRange_Index = kSysConst_SampleCountLog2_Index + 1,
-    kSysConst_AlphaTestRange_Vec = kSysConst_SSAAInvScale_Vec + 1,
+    kSysConst_AlphaTestRange_Vec = kSysConst_SampleCountLog2_Vec + 1,
     kSysConst_AlphaTestRange_Comp = 0,
     kSysConst_EDRAMPitchTiles_Index = kSysConst_AlphaTestRange_Index + 1,
     kSysConst_EDRAMPitchTiles_Vec = kSysConst_AlphaTestRange_Vec,
@@ -533,8 +562,24 @@ class DxbcShaderTranslator : public ShaderTranslator {
     kSysConst_ColorOutputMap_Index = kSysConst_ColorExpBias_Index + 1,
     kSysConst_ColorOutputMap_Vec = kSysConst_ColorExpBias_Vec + 1,
 
-    kSysConst_EDRAMStencilReference_Index = kSysConst_ColorOutputMap_Index + 1,
+    kSysConst_EDRAMDepthRange_Index = kSysConst_ColorOutputMap_Index + 1,
-    kSysConst_EDRAMStencilReference_Vec = kSysConst_ColorOutputMap_Vec + 1,
+    kSysConst_EDRAMDepthRange_Vec = kSysConst_ColorOutputMap_Vec + 1,
+    kSysConst_EDRAMDepthRangeScale_Comp = 0,
+    kSysConst_EDRAMDepthRangeOffset_Comp = 1,
+    kSysConst_EDRAMPolyOffsetFront_Index = kSysConst_EDRAMDepthRange_Index + 1,
+    kSysConst_EDRAMPolyOffsetFront_Vec = kSysConst_EDRAMDepthRange_Vec,
+    kSysConst_EDRAMPolyOffsetFrontScale_Comp = 2,
+    kSysConst_EDRAMPolyOffsetFrontOffset_Comp = 3,
+
+    kSysConst_EDRAMPolyOffsetBack_Index =
+        kSysConst_EDRAMPolyOffsetFront_Index + 1,
+    kSysConst_EDRAMPolyOffsetBack_Vec = kSysConst_EDRAMPolyOffsetFront_Vec + 1,
+    kSysConst_EDRAMPolyOffsetBackScale_Comp = 0,
+    kSysConst_EDRAMPolyOffsetBackOffset_Comp = 1,
+
+    kSysConst_EDRAMStencilReference_Index =
+        kSysConst_EDRAMPolyOffsetBack_Index + 1,
+    kSysConst_EDRAMStencilReference_Vec = kSysConst_EDRAMPolyOffsetBack_Vec + 1,
     kSysConst_EDRAMStencilReference_Comp = 0,
     kSysConst_EDRAMStencilReadMask_Index =
         kSysConst_EDRAMStencilReference_Index + 1,
@@ -626,6 +671,7 @@ class DxbcShaderTranslator : public ShaderTranslator {
 
   static constexpr uint32_t kInterpolatorCount = 16;
   static constexpr uint32_t kPointParametersTexCoord = kInterpolatorCount;
+  static constexpr uint32_t kClipSpaceZWTexCoord = kPointParametersTexCoord + 1;
 
   enum class InOutRegister : uint32_t {
     // IF ANY OF THESE ARE CHANGED, WriteInputSignature and WriteOutputSignature
@@ -634,10 +680,12 @@ class DxbcShaderTranslator : public ShaderTranslator {
 
     kVSOutInterpolators = 0,
     kVSOutPointParameters = kVSOutInterpolators + kInterpolatorCount,
+    kVSOutClipSpaceZW,
     kVSOutPosition,
 
     kPSInInterpolators = 0,
     kPSInPointParameters = kPSInInterpolators + kInterpolatorCount,
+    kPSInClipSpaceZW,
     kPSInPosition,
     kPSInFrontFace,
   };
@@ -726,14 +774,22 @@ class DxbcShaderTranslator : public ShaderTranslator {
 
   // Writing the epilogue.
   void CompleteVertexShader();
-  // Converts the depth in system_temp_depth_.x to 24-bit unorm or float,
+  // Converts four depth values to 24-bit unorm or float, depending on the flag
-  // depending on the flag value. Uses system_temp_depth_.yz as scratch - w not
+  // value.
-  // touched.
+  void CompletePixelShader_DepthTo24Bit(uint32_t depths_temp);
-  void CompletePixelShader_DepthTo24Bit();
   // This just converts the color output value from/to gamma space, not checking
   // any conditions.
   void CompletePixelShader_GammaCorrect(uint32_t color_temp, bool to_gamma);
   void CompletePixelShader_WriteToRTVs();
+  // Performs depth/stencil testing. After the test, coverage_out_temp will
+  // contain non-zero values for samples that passed the depth/stencil test and
+  // are included in SV_Coverage, and zeros for those who didn't.
+  //
+  // edram_dword_offset_temp.x must contain the address of the first
+  // depth/stencil sample - .yzw will be overwritten by this function with the
+  // addresses for the other samples if depth/stencil is enabled.
+  void CompletePixelShader_WriteToROV_DepthStencil(
+      uint32_t edram_dword_offset_temp, uint32_t coverage_out_temp);
   // Extracts widths and offsets of the components in the lower or the upper
   // dword of a pixel from the format constants, for use as ibfe and bfi
   // operands later.
@@ -752,10 +808,9 @@ class DxbcShaderTranslator : public ShaderTranslator {
         kROVRTFormatFlagTemp_ColorFixed * 0b00010101 +
         kROVRTFormatFlagTemp_AlphaFixed * 0b01000000,
   };
-  void CompletePixelShader_WriteToROV_LoadColor(
+  void CompletePixelShader_WriteToROV_UnpackColor(
-      uint32_t edram_dword_offset_low_temp,
+      uint32_t data_low_temp, uint32_t data_high_temp, uint32_t data_component,
-      uint32_t edram_dword_offset_high_temp, uint32_t rt_index,
+      uint32_t rt_index, uint32_t rt_format_flags_temp, uint32_t target_temp);
-      uint32_t rt_format_flags_temp, uint32_t target_temp);
   // Clamps the color to the range representable by the render target's format.
   // Will also remove NaN since min and max return the non-NaN value.
   // color_in_temp and color_out_temp may be the same.
@@ -783,10 +838,10 @@ class DxbcShaderTranslator : public ShaderTranslator {
                                             uint32_t dest_color_temp);
   // Assumes the incoming color is already clamped to the range representable by
   // the RT format.
-  void CompletePixelShader_WriteToROV_StoreColor(
+  void CompletePixelShader_WriteToROV_PackColor(
-      uint32_t edram_dword_offset_low_temp,
+      uint32_t data_low_temp, uint32_t data_high_temp, uint32_t data_component,
-      uint32_t edram_dword_offset_high_temp, uint32_t rt_index,
+      uint32_t rt_index, uint32_t rt_format_flags_temp,
-      uint32_t rt_format_flags_temp, uint32_t source_and_scratch_temp);
+      uint32_t source_and_scratch_temp);
   void CompletePixelShader_WriteToROV();
   void CompletePixelShader();
   void CompleteShaderCode();
@@ -954,6 +1009,7 @@ class DxbcShaderTranslator : public ShaderTranslator {
     kFloat4,
     kInt,
     kUint,
+    kUint2,
     kUint4,
     // Float constants - size written dynamically.
     kFloat4ConstantArray,
@@ -1050,10 +1106,14 @@ class DxbcShaderTranslator : public ShaderTranslator {
   uint32_t system_temp_color_[4];
   // Whether the color output has been written in the execution path (ROV only).
   uint32_t system_temp_color_written_;
-  // Depth output in pixel shader, and 3 dwords usable as scratch for operations
+  // Depth value (ROV only). The meaning depends on whether the shader writes to
-  // related to depth. Currently only used for ROV depth.
+  // depth.
-  // TODO(Triang3l): Reduce depth to 24-bit in pixel shaders when using a DSV
+  // If depth is written to:
-  // for accuracy.
+  // - X - the value that was written to oDepth.
+  // If not:
+  // - X - clip space Z / clip space W from the respective pixel shader input.
+  // - Y - depth X derivative (for polygon offset).
+  // - Z - depth Y derivative.
   uint32_t system_temp_depth_;
 
   // The bool constant number containing the condition for the currently
@@ -1080,8 +1140,6 @@ class DxbcShaderTranslator : public ShaderTranslator {
   // predicate condition anymore.
   bool cf_exec_predicate_written_;
 
-  bool writes_depth_;
-
   std::vector<TextureSRV> texture_srvs_;
   std::vector<SamplerBinding> sampler_bindings_;
 

src/xenia/gpu/shader_translator.cc

@@ -62,6 +62,7 @@ void ShaderTranslator::Reset() {
   for (size_t i = 0; i < xe::countof(writes_color_targets_); ++i) {
     writes_color_targets_[i] = false;
   }
+  writes_depth_ = false;
 }
 
 bool ShaderTranslator::GatherAllBindingInformation(Shader* shader) {
@@ -274,8 +275,12 @@ void ShaderTranslator::GatherInstructionInformation(
               }
             }
             if (op.is_export()) {
-              if (is_pixel_shader() && op.vector_dest() <= 3) {
+              if (is_pixel_shader()) {
+                if (op.vector_dest() <= 3) {
                   writes_color_targets_[op.vector_dest()] = true;
+                } else if (op.vector_dest() == 61) {
+                  writes_depth_ = true;
+                }
               }
             } else {
               if (op.is_vector_dest_relative()) {
@@ -291,8 +296,12 @@ void ShaderTranslator::GatherInstructionInformation(
               uses_register_dynamic_addressing_ = true;
             }
             if (op.is_export()) {
-              if (is_pixel_shader() && op.scalar_dest() <= 3) {
+              if (is_pixel_shader()) {
+                if (op.scalar_dest() <= 3) {
                   writes_color_targets_[op.scalar_dest()] = true;
+                } else if (op.scalar_dest() == 61) {
+                  writes_depth_ = true;
+                }
               }
             } else {
               if (op.is_scalar_dest_relative()) {

src/xenia/gpu/shader_translator.h

@@ -55,6 +55,8 @@ class ShaderTranslator {
   }
   // True if the current shader writes to a color target on any execution path.
   bool writes_color_target(int i) const { return writes_color_targets_[i]; }
+  // True if the current shader overrides the pixel depth.
+  bool writes_depth() const { return writes_depth_; }
   // A list of all vertex bindings, populated before translation occurs.
   const std::vector<Shader::VertexBinding>& vertex_bindings() const {
     return vertex_bindings_;
@@ -227,6 +229,7 @@ class ShaderTranslator {
   Shader::ConstantRegisterMap constant_register_map_ = {0};
   bool uses_register_dynamic_addressing_ = false;
   bool writes_color_targets_[4] = {false, false, false, false};
+  bool writes_depth_ = false;
 
   static const AluOpcodeInfo alu_vector_opcode_infos_[0x20];
   static const AluOpcodeInfo alu_scalar_opcode_infos_[0x40];

src/xenia/gpu/spirv_shader_translator.cc

@@ -491,7 +491,7 @@ std::vector<uint8_t> SpirvShaderTranslator::CompleteTranslation() {
     b.addExecutionMode(mainFn, spv::ExecutionModeOriginUpperLeft);
 
     // If we write a new depth value, we must declare this mode!
-    if (writes_depth_) {
+    if (writes_depth()) {
       b.addExecutionMode(mainFn, spv::ExecutionModeDepthReplacing);
     }
 
@@ -648,7 +648,6 @@ std::vector<uint8_t> SpirvShaderTranslator::CompleteTranslation() {
 
   // Cleanup builder.
   cf_blocks_.clear();
-  writes_depth_ = false;
   loop_head_block_ = nullptr;
   loop_body_block_ = nullptr;
   loop_cont_block_ = nullptr;
@@ -3339,7 +3338,6 @@ void SpirvShaderTranslator::StoreToResult(Id source_value_id,
       storage_type = float_type_;
       storage_offsets.push_back(0);
       storage_array = false;
-      writes_depth_ = true;
       break;
     case InstructionStorageTarget::kNone:
       assert_always();

src/xenia/gpu/spirv_shader_translator.h

@@ -164,8 +164,6 @@ class SpirvShaderTranslator : public ShaderTranslator {
   spv::Id vtx_ = 0;  // Vertex buffer array (32 runtime arrays)
   std::unordered_map<uint32_t, uint32_t> vtx_binding_map_;
 
-  bool writes_depth_ = false;
-
   // SPIR-V IDs that are part of the in/out interface.
   std::vector<spv::Id> interface_ids_;